SoC Power & RTL Modelling Engineer

AMD; Santa Clara (CA); Hybrid; USD 120,000 - 180,000; Full time

Job summary

AMD in Santa Clara, CA is seeking a SoC Power/RTL engineer to drive efficiency methodology across IP and overall platform power modeling. You will analyze power-performance tradeoffs, optimize RTL implementations, and partner with architecture, RTL design, verification, and power teams to deliver measurable power improvements.

Applicants should have a strong background in processor architecture, digital design, and verification, plus Python scripting.

Qualifications

• Passion for modern processor architecture, digital design, and verification.
• Collaborative team player with strong communication skills.
• Excellent analytical and problem-solving abilities.

Responsibilities

• Contribute to SoC power methodology, RTL power analysis, and optimization to improve power efficiency across the SoC.
• Collaborate with architecture, RTL design, verification, and power teams to identify, evaluate, and implement power-efficiency features and enhancements.
• Analyze power and performance tradeoffs using power models, RTL simulations, workloads, and design data to support product power targets.
• Evaluate simulation and emulation traces for power projection and correlate projections with power-model predictions and silicon data when available.
• Support the development and continuous improvement of SoC power models and methodologies, with opportunities to grow ownership of power-modeling activities.
• Analyze power results, identify key power contributors and anomalies, and work with design teams to drive RTL power optimizations.
• Drive power-efficiency ideas from concept through RTL implementation, validation, and measurable power improvements.
• Apply power methodology and analysis techniques to identify and implement RTL and SoC-level power-efficiency enhancements.

Skills

RTL design

Digital logic

SoC architecture

Power modeling

Python

Education

Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field

Job description

AMD in Santa Clara, CA is seeking a SoC Power/RTL engineer to drive efficiency methodology across IP and overall platform power modeling. You will analyze power-performance tradeoffs, optimize RTL implementations, and partner with architecture, RTL design, verification, and power teams to deliver measurable power improvements.

Applicants should have a strong background in processor architecture, digital design, and verification, plus Python scripting.