SoC Logic Design Engineer

Altera; San Jose (CA); On-site; USD 137,000 - 190,000; Full time

Job summary

Altera is seeking a SoC Logic Design Engineer to contribute to high-performance processing and security subsystems. The ideal candidate will have a strong background in logic design, verification processes, and industry-specific qualifications, delivering innovative solutions in semiconductor manufacturing.

Benefits

Medical insurance

Vision insurance

401(k)

Paid maternity leave

Paid paternity leave

Qualifications

• 7+ years of total experience in relevant fields.
• Experience with coherent and non-coherent interconnect.
• Expert in SOC integration.

Responsibilities

• Develop logic design and RTL coding for SoC designs.
• Participate in defining architecture and microarchitecture features.
• Perform quality checks from RTL to timing/power convergence.

Skills

Designing complex logic

Integration of ARM cores

Knowledge in DFT

Static timing analysis

Education

University degree in Electrical Engineering

University degree in Computer Engineering

University degree in Computer Science

Job description

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This range is provided by Altera. Your actual pay will be based on your skills and experience — talk with your recruiter to learn more.

Base pay range

$137,700.00/yr - $189,600.00/yr

Additional compensation types

Annual Bonus

Direct message the job poster from Altera

Talent Acquisition @ Altera | We are hiring!

Join Altera, a pioneer in programmable logic solutions, where innovation meets practicality. We empower system, semiconductor, and technology companies to rapidly and cost-effectively differentiate and excel in their markets. Our legacy of innovation is matched by our commitment to our clients, whom we serve through a robust distribution network and a dedicated sales force. Our portfolio spans programmable logic products, acceleration platforms, software, and IP, all designed to accelerate the pace of innovation.

The Processing, Security, and Configuration Design team is responsible for delivering the high-performance processing and security subsystems and we are seeking experienced SoC Logic Design Engineers to join our team to help Altera provide world-class SoC capabilities to their FPGA solutions.

What You Will Do

As a SoC Logic Design Engineer you will:

• Develop the logic design, register transfer level (RTL) coding, and simulation for an SoC design and integrates logic of IP blocks and subsystems into a full chip SoC or discrete component design.
• Participate in the definition of architecture and microarchitecture features of the block being designed.
• Perform quality checks in various logic design aspects ranging from RTL to timing/power convergence.
• Apply various strategies, tools, and methods to write RTL and optimize logic to qualify the design to meet power, performance, area, and timing goals as well as design integrity for physical implementation.
• Review the verification plan and implementation to ensure design features are verified correctly and resolves and implements corrective measures for failing RTL tests to ensure correctness of features.
• Follow secure development practices to address the security threat model and security objects within the design.
• Work with IP providers to integrate and validate IPs at the SoC level. Drives quality assurance compliance for smooth IP-SoC handoff.

Salary Range

Our compensation reflects the cost of labor within the US market. Actual salary may vary based on a number of factors including job location, job-related knowledge, skills, experiences, trainings, etc. We also offer incentive opportunities that reward employees based on individual and company performance.

$137.7k - $189.6k USD

Qualifications:

What We Want to See:

We’d love to talk to you if you have a university degree in electrical engineering, computer engineering, computer science, or related fields with 7+ years total experience, and experience in some, or all, of the following:

• Experience designing complex logic from scratch
• Experience integrating ARM advanced cores and related ARM IP
• Experience with coherent and non-coherent interconnect
• Expert SOC integrator
• Knowledge in DFT, physical design, and verification
• Static timing experience

Job Type:

Regular

Shift:

Shift 1 (United States of America)

Primary Location:

Austin, Texas, United States

Additional Locations:

San Jose, California, United States

Posting Statement:

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

Seniority level

• Seniority level

  Mid-Senior level

Employment type

• Employment type

  Full-time

Job function

• Industries

  Semiconductor Manufacturing

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Inferred from the description for this job

Medical insurance

Vision insurance

401(k)

Paid maternity leave

Paid paternity leave

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