SoC Limits Management Lead

Google LLC

Mountain View, San Diego (CA, CA)

On-site

USD 240,000 - 333,000

Full time

9 days ago

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Job summary

Google LLC in Mountain View, CA is seeking a SoC Limits Management Lead to balance high performance with physical and electrical constraints across next-generation systems. You will bridge hardware IP, system software, and product requirements to design a holistic limits management subsystem for maximum performance under peak current.

The role leads cross-functional teams, defines telemetry needs, and guides post-silicon validation to ensure the intended architectural outcomes while delivering

Qualifications

  • Bachelor’s degree in Electrical Engineering, Computer Engineering, Computer Science, or equivalent practical experience.
  • 15 years of industry experience in Power Management or Low-Power Design/Methodology.
  • Experience navigating the full product delivery cycle, from initial architecture definition through to post-silicon productization.
  • Experience with low-power architectures and advanced power optimization techniques.

Responsibilities

  • Define SoC limits management by integrating hardware triggers, firmware policies, and software mitigations to protect silicon health.
  • Lead cross-functional teams to standardize mitigation features across IP and hardware blocks.
  • Drive evolution of Sensing IPs (Voltage, Current, Temperature) and trigger mechanisms for high current densities.
  • Design real-time telemetry requirements to monitor silicon behavior and define performance-impact profiles.
  • Drive ROI alignment and oversee Post-Silicon Validation to ensure silicon behavior matches architecture.

Skills

Power management
Low-power design
Architecture definition
Product lifecycle
Cross-functional leadership

Education

Bachelor's degree

Job description

In most instances, this position requires in-person interviews as part of the hiring process. Note: By applying to this position you will have an opportunity to share your preferred working location from the following: Mountain View, CA, USA; San Diego, CA, USA.

  • Bachelor’s degree in Electrical Engineering, Computer Engineering, Computer Science, or equivalent practical experience.
  • 15 years of industry experience in Power Management or Low-Power Design/Methodology.
  • Experience navigating the full product delivery cycle, from initial architecture definition through to post-silicon productization.
  • Experience with low-power architectures and advanced power optimization techniques.
Preferred qualifications:
  • MS or PhD in Electronics or Computer Engineering, or equivalent, with a focus on computer architecture and power/performance analysis.
  • Experience in peak power management, in-rush current, PDN droop detection and mitigation, adaptive clock distribution, aging and process monitors, power aware floorplanning, battery technology, concurrency management and thermal management.
  • Exceptional leadership and influencing skills, with an ability to influence cross-functional roadmaps and drive ROI-based technical decisions.
About the job

Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of Google's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.

As a SoC Limits Management Lead in the System Power and Performance team, you will be responsible for defining how our next-generation systems balance high performance against physical and electrical constraints. You will bridge the gap between hardware IP, system software, and product requirements to design a holistic "Limits Management" subsystem. Your work ensures our SoCs deliver maximum performance under peak current constraints, while maintaining long-term reliability and stability.

Google's mission is to organize the world's information and make it universally accessible and useful. Our team combines the best of Google AI, Software, and Hardware to create radically helpful experiences. We research, design, and develop new technologies and hardware to make computing faster, seamless, and more powerful. We aim to make people's lives better through technology.

Individual pay is determined by factors including job-related skills, experience, and relevant education or training.

US: $240000 - $333000 (USD) + 25% bonus target + equity + benefits
Learn more about benefits at Google .

  • Define the SoC limits management by integrating hardware triggers, firmware policies, and software mitigations to protect silicon health.
  • Lead cross-functional teams to standardize critical mitigation features, including Power Telemetry, Estimators, and Droop Detectors, across all IP and hardware blocks.
  • Drive the long-term evolution of Sensing IPs (Voltage, Current, Temperature) and trigger mechanisms to address escalating current densities and industry trends.
  • Design real-time telemetry requirements to monitor silicon behavior and define performance-impact profiles for various mitigation strategies.
  • Drive organizational consensus on feature return on investment (ROI) and oversee Post-Silicon Validation to ensure physical silicon behavior aligns with architectural intent.

Google is proud to be an equal opportunity and affirmative action employer. We are committed to building a workforce that is representative of the users we serve, creating a culture of belonging, and providing an equal employment opportunity regardless of race, creed, color, religion, gender, sexual orientation, gender identity/expression, national origin, disability, age, genetic information, veteran status, marital status, pregnancy or related condition (including breastfeeding), expecting or parents-to-be, criminal histories consistent with legal requirements, or any other basis protected by law. See also Google's EEO Policy , Know your rights: workplace discrimination is illegal , Belonging at Google , and How we hire .

Google is a global company and, in order to facilitate efficient collaboration and communication globally, English proficiency is a requirement for all roles unless stated otherwise in the job posting.

Equity is granted exclusively and discretionarily by Alphabet Inc. on the basis of an agreement concluded between you and Alphabet Inc. Alphabet Inc. is your sole contractual partner with respect to equity grants. GSU grants are not guaranteed, are discretionary, are subject to approval by the Alphabet Inc. board of directors or its delegate, the terms of the relevant Alphabet Inc. stock plan, and your grant agreement. They have no impact on statutory payments. Current or past grants do not confer an acquired right.

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