SoC Infrastructure HW Architect: Chiplet & NOC Expert

QUALCOMM, Inc.; San Diego (CA); On-site; USD 155,000 - 233,000; Full time

Job summary

Qualcomm Technologies, Inc. is seeking a senior HW architect to define the next generation of SOC infrastructure IP. You will work on multi-die architectures, interconnects, and security features, aligning HW with product requirements and SW interfaces.

Based in San Diego, you will drive end-to-end silicon HW design flows, collaborate with firmware teams, and mentor junior engineers while ensuring performance and power targets are met.

Qualifications

• Bachelor's degree in Electrical Engineering, Computer Science, or related field and 4+ years of Systems Engineering or related work experience.
• Master's degree in Electrical Engineering, Computer Science, or related field and 3+ years of Systems Engineering or related work experience.
• PhD in Electrical Engineering, Computer Science, or related field and 2+ years of Systems Engineering or related work experience.
• 2+ years of experience in one or more system architecture technology areas and products (e.g., Power System, Shared Resource Management, Limits/Thermal Management, Hardware Islands).

Responsibilities

• Define HW architecture for SOC infrastructure IPs with ARM Architecture enabled and beyond.
• Drive HW end-to-end silicon HW design flow and verification.
• Collaborate on HW-SW interfaces and firmware development.

Skills

Multi-die architectures

Die-to-Die links

Chip-to-Chip links

Interconnect protocols

SOC infrastructure IP

NOC/SMMU/Caches

Power management

Security/Debug architectures

HW-SW interfaces

RTL design

Performance modeling

Education

Bachelor's in Electrical Engineering or Computer Science

Master's in Electrical Engineering or Computer Science

PhD in Electrical Engineering or Computer Science

System architecture experience (Power/ Resources)

Tools

PCIe

CXL

USB

UFS

MIPI

UCIe

ARM architecture

Job description

Qualcomm Technologies, Inc. is seeking a senior HW architect to define the next generation of SOC infrastructure IP. You will work on multi-die architectures, interconnects, and security features, aligning HW with product requirements and SW interfaces.

Based in San Diego, you will drive end-to-end silicon HW design flows, collaborate with firmware teams, and mentor junior engineers while ensuring performance and power targets are met.