SoC Design Verification Lead

Velaura AI, Inc.; Santa Clara (CA); On-site; USD 200,000 - 300,000; Full time

Job summary

Velaura AI, Inc. is seeking an experienced verification leader to own system level verification of the Physical AI SoC.

You will work with architects, RTL and software teams to ensure correctness, performance, reliability and safety of the design from RTL blocks to full systems running real workloads. You will define the verification plan, sign-off, and drive a small team, balancing hands-on coding with technical leadership across boot, clock/reset, low power, IO and memory subsystems, and

Qualifications

• 12+ years in design verification, including SoC-level experience.
• Experience leading SoC verification across multiple projects through sign-off and tape-out.
• Experience building and leading a verification team.
• Proficient in SystemVerilog, UVM, C/C++ with coverage-driven verification at system level.
• Experience managing simulation flows on CPU-based SoCs (ARM or RISC-V).
• Knowledge of IO/memory subsystems (PCIe, LPDDR5/LPDDR6).
• Experience verifying boot/root of trust, clock/reset topology, and low-power behavior at system level.

Responsibilities

• Own the SoC level verification strategy, plan and execution for the Velaura Physical AI SoC.
• Build and lead a team of SoC verification engineers, setting technical direction and reviewing their work.
• Define the SoC verification architecture and environment, and stay hands on in the code.
• Coordinate verification across boot and security, clock and reset, low power, and the IO and memory subsystems.
• Define sign off criteria and coverage goals, and drive closure through tape out.
• Track and report verification progress, coverage and risk to engineering leadership.
• Work with architecture, RTL, DFT, firmware and software teams on system level correctness and pre silicon bring up.
• Partner with CAD and infrastructure teams on simulation, emulation and regression capacity.

Skills

SoC verification leadership

SystemVerilog

UVM

C/C++

sign-off & tape-out planning

communication across disciplines

Tools

Simulation flows (ARM/RISC-V)

Emulation

FPGA prototyping

Job description

Role Overview

We are looking for an experienced verification leader to help verify and deliver Velaura's next generation Physical AI SoC. You will work closely with architects, RTL engineers, software engineers and system teams to establish confidence in the correctness, performance, reliability and safety of the design, from individual RTL blocks through complete hardware and software systems running real workloads.

Role Overview

We are looking for an experienced verification leader to help verify and deliver Velaura's next generation Physical AI SoC. You will work closely with architects, RTL engineers, software engineers and system teams to establish confidence in the correctness, performance, reliability and safety of the design, from individual RTL blocks through complete hardware and software systems running real workloads. This role leads system level verification. You will own the SoC verification plan and carry it through sign off and into tape out, covering boot and root of trust, clock and reset topology, low power behavior, and the IO and memory subsystems. You will set technical direction for a small team while staying hands on in the environment yourself.

Responsibilities

• Own the SoC level verification strategy, plan and execution for the Velaura Physical AI SoC.
• Build and lead a team of SoC verification engineers, setting technical direction and reviewing their work.
• Define the SoC verification architecture and environment, and stay hands on in the code.
• Coordinate verification across boot and security, clock and reset, low power, and the IO and memory subsystems.
• Define sign off criteria and coverage goals, and drive closure through tape out.
• Track and report verification progress, coverage and risk to engineering leadership.
• Work with architecture, RTL, DFT, firmware and software teams on system level correctness and pre silicon bring up.
• Partner with CAD and infrastructure teams on simulation, emulation and regression capacity.

Required Qualifications

• 12 or more years in design verification, including significant SoC level experience.
• Experience leading SoC verification across multiple projects through sign off and tape out.
• Experience building and leading a team of verification engineers.
• Experience with SystemVerilog, UVM, C and C++ and coverage driven verification at system level.
• Experience managing simulation flows on CPU based SoCs such as ARM or RISC-V.
• Knowledge of IO and memory subsystem IP such as PCIe and LPDDR5 or LPDDR6.
• Experience verifying boot and root of trust, clock and reset topology, and low power behavior at system level, including CDC, RDC and UPF based flows.
• Excellent communication skills and the ability to influence engineering leaders across disciplines.

Preferred Qualifications

• Experience with HW and SW co verification and pre silicon software bring up.
• Experience with emulation and FPGA prototyping at SoC level.
• Experience with one or more of ISO 26262, IEC 61508, IEC 61511 or ISO 13849.
• Experience verifying QoS, latency sensitive or real time systems.
• Experience with post silicon bring up, debug and root cause analysis.
• Experience building a verification team at an early stage company.
• Familiarity with robotics, drones, autonomous vehicles or industrial automation systems.
• Experience using AI assisted verification workflows to improve productivity and coverage.

$200,000 - $300,000 a year

Compensation & Benefits

At Velaura, we believe exceptional talent deserves exceptional rewards. Compensation for this role includes a base salary and very competitive equity compensation, allowing team members to share in the company’s long‑term success.

The base pay listed represents a good faith estimate that the Company reasonably expects to pay for this position at the time of hire. Actual compensation will depend on multiple factors, including the candidate's skills, qualifications, relevant experience, and geographic location.

In addition to base salary and equity compensation, Velaura offers a comprehensive benefits package that may include medical, dental, and vision coverage; paid time off; flexible work arrangements; professional development opportunities; and other benefits designed to support the well‑being and growth of our team.

Velaura is committed to pay equity and transparency and regularly benchmarks compensation to ensure we remain competitive in the market.

Why Velaura?

Velaura is building next-generation compute technology for cloud, edge, and Physical AI. Our solutions will enable robots, autonomous systems, drones, and other intelligent machines to operate efficiently in the physical world.

This is an opportunity to help build foundational technology at a time when the industry is undergoing fundamental change. You will work alongside experienced leaders, architects, engineers, and operators who have delivered industry-defining products across mobile, cloud, semiconductor, and AI platforms. If you enjoy solving difficult problems, working across disciplines, and helping shape the future of Physical AI, we would love to hear from you.

Equal Employment Opportunity and Accommodations

Velaura is an Equal Opportunity Employer that is committed to inclusion and diversity. Qualified applicants will receive consideration for employment without regard to race, color, religion, national origin, gender, sexual orientation, gender identity, disability or protected veteran status. We also take affirmative action to offer employment opportunities to minorities, women, individuals with disabilities, and protected veterans.

Velaura is committed to working with qualified individuals with physical or mental disabilities. Applicants who would like to contact us regarding the accessibility of our website or who need special assistance or a reasonable accommodation for any part of the application or hiring process may contact us at: [email protected]. This contact information is for accommodation requests only. Evaluation of requests for reasonable accommodation will be determined on a case‑by‑case basis.

We may use artificial intelligence (AI) tools to support parts of the hiring process, such as reviewing applications, analyzing resumes, or assessing responses and identifying potential inconsistencies or verification signals in application materials based on available information. These tools assist our recruitment team but do not replace human judgment. Final hiring decisions are ultimately made by humans. If you would like more information about how your data is processed, please contact us.