SOC Architect

OpenAI; Los Angeles (CA); On-site; USD 130,000 - 170,000; Full time

Job summary

OpenAI is seeking a skilled SoC Architect to shape next-generation custom AI silicon for edge deployments in Los Angeles. This role requires experience in SoC architecture, driving execution from concept to delivery, along with collaboration with internal and external partners. The ideal candidate will lead efforts in the design and optimization of high-performance, energy-efficient chips suited for AI/ML workloads, ensuring robust performance for real-world deployment.

Qualifications

• Proven experience defining and delivering complex SoC or ASIC architectures from concept to production.
• Deep understanding of AI/ML accelerators, edge inference workloads, and energy-efficient compute design.
• Strong knowledge of SoC subsystems including CPU/GPU/NPU architectures, memory hierarchies, interconnects, and power management.

Responsibilities

• Define the architecture and technical roadmap for custom SoCs targeted for edge applications.
• Drive system-level trade-off analysis across compute, memory, interconnect, power, thermal, and cost constraints.
• Lead hardware/software co-design efforts to maximize performance per watt and end-to-end system efficiency.

Skills

SoC/ASIC architecture experience

AI/ML accelerators understanding

Cross-functional team leadership

Strong communication skills

Job description

OpenAI’s mission is to discover and enact the path to safe, beneficial AGI. The Scaling team builds robust and scalable software and hardware to support our research efforts and offers core development services for mission‑critical goals and applications.

We’re expanding our team to work more closely with partners on hardware optimization and co‑design. Engineers on this team cut across the stack from ML model/workload understanding through system architecture to microarchitecture, and will optimize partner hardware for our workloads from early concept to production.

About the Role

We are seeking an experienced SoC Architect to define and develop next‑generation custom AI silicon for edge deployments, shaping highly efficient, high‑performance SoCs optimized for machine learning inference and on‑device intelligence. The role collaborates with internal engineering teams and external partners to translate product requirements into scalable silicon solutions, driving execution from concept through delivery.

In this role you will:

• Define the architecture and technical roadmap for custom SoCs targeted for edge applications.
• Drive system‑level trade‑off analysis across compute, memory, interconnect, power, thermal, and cost constraints.
• Architect energy‑efficient ML compute subsystems optimized for inference workloads and real‑world deployment environments.
• Collaborate with internal hardware, software, systems, and product teams to align architecture with platform needs.
• Partner with external silicon vendors, IP providers, and manufacturing partners to execute development plans.
• Lead hardware/software co‑design efforts to maximize performance per watt and end‑to‑end system efficiency.
• Guide implementation teams through microarchitecture, RTL development, validation, and bring‑up phases.
• Operate effectively in agile development environments and help teams deliver against aggressive schedules and milestones.

You might thrive in this role if:

• Proven experience defining and delivering complex SoC or ASIC architectures from concept to production.
• Deep understanding of AI/ML accelerators, edge inference workloads, and energy‑efficient compute design.
• Strong knowledge of SoC subsystems including CPU/GPU/NPU architectures, memory hierarchies, interconnects, and power management.
• Experience working with both internal engineering organizations and external strategic partners.
• Ability to lead cross‑functional teams in fast‑paced, execution‑driven environments.
• Strong communication skills with the ability to influence technical direction across organizations.

Preferred Qualifications

• Experience with edge AI devices, embedded systems, or consumer hardware platforms.
• Background in performance modeling, silicon cost optimization, and workload‑driven architecture.
• Familiarity with advanced process nodes and modern semiconductor development flows.

To comply with U.S. export control laws and regulations, candidates for this role may need to meet certain legal status requirements as provided in those laws and regulations.

We are an equal opportunity employer, and we do not discriminate on the basis of race, religion, color, national origin, sex, sexual orientation, age, veteran status, disability, genetic information, or other applicable legally protected characteristic.