SoC Analog & Mixed-Signal Design Engineer

Intel Corporation

Hillsboro (OR)

Hybrid

USD 122,000 - 232,000

Full time

3 days ago
Be an early applicant
Application generator

A complete application in a minute — tailored resume and cover letter, ready to send.

Get past ATS filters

Job summary

Intel Corporation in Hillsboro, Oregon seeks an experienced SoC Analog & Mixed-Signal Design Engineer to design and optimize analog/mixed-signal circuits in advanced CMOS nodes, from architecture through verification, delivering robust IP for power, performance, area and yield.

You will collaborate with architecture and layout teams, create floorplans, develop test plans, verify results, minimize leakage, and help push high-quality silicon solutions for next-generation products.

Qualifications

  • Bachelor's degree in Electrical Engineering, Electronics, or a related field with 4+ years of experience in analog circuit design.
  • Master's degree in the same fields with 2+ years of experience.
  • PhD in the same field with 1+ year of educational or work experience.
  • Experience with analog simulation tools and methodologies.
  • Experience with circuit optimization techniques focused on power, area, timing, and yield.
  • Experience with advanced CMOS process nodes and their application in analog circuit design.

Responsibilities

  • Design, develop, and build analog circuits in advanced CMOS process nodes.
  • Create floorplans, perform circuit design, extract chip parameters, and simulate analog behavior models.
  • Develop and execute test plans to verify designs against circuit and block microarchitecture specifications.
  • Evaluate test results, verify functionality, and optimize circuits for power, performance, area, timing, and yield goals.
  • Collaborate cross-functionally to report design progress and address performance or circuit design issues.
  • Minimize leakage, optimize power consumption, and enhance the area efficiency of analog/mixed-signal blocks.
  • Work closely with architecture and layout teams to ensure robust functionality and electrical capabilities.

Skills

Analog circuit design
Power optimization
Circuit simulation
CMOS process knowledge
Team collaboration
Technical communication

Education

Bachelor's degree in Electrical Engineering
Master's degree in Electrical Engineering
PhD in Electrical Engineering

Tools

SPICE simulations
Cadence/Other analog tools

Job description

Job Details: Job Description: The Role and Impact Are you passionate about solving complex analog and mixed-signal design challenges and developing technology that powers the next generation of computing? As a SoC Analog & Mixed-Signal Design Engineer, you will design and optimize analog and mixed-signal circuits in advanced CMOS process technologies. You will contribute across the design lifecycle, from circuit architecture and simulation through optimization and design verification, helping deliver robust IP that meets demanding power, performance, area, timing, and yield requirements. You will collaborate with architecture, layout, and other engineering teams to solve complex circuit challenges and help deliver high-quality silicon solutions for Intel product

What You'll Do
  • Key responsibilities will include but not limited to:
  • Design, develop, and build analog circuits in advanced CMOS process nodes.
  • Create floorplans, perform circuit design, extract chip parameters, and simulate analog behavior models.
  • Develop and execute test plans to verify designs against circuit and block microarchitecture specifications.
  • Evaluate test results, verify functionality, and optimize circuits for power, performance, area, timing, and yield goals.
  • Collaborate cross-functionally to report design progress and address performance or circuit design issues.
  • Minimize leakage, optimize power consumption, and enhance the area efficiency of analog/mixed-signal blocks.
  • Work closely with architecture and layout teams to ensure robust functionality and electrical capabilities.
Behavioral traits that we are looking for
  • Technical Problem-Solving: Applies an analytical, data-driven approach to complex and ambiguous analog circuit-design challenges.
  • Design Ownership: Takes ownership of assigned designs, drives technical issues toward resolution, and contributes to high-impact product outcomes.
  • Collaboration: Works effectively across architecture, circuit design, layout, and other cross-functional engineering teams.
  • Technical Communication: Clearly communicates design decisions, trade-offs, risks, results, and recommendations to technical stakeholders.
  • Attention to Detail: Applies disciplined engineering practices to circuit design, simulation, analysis, and verification.
  • Learning Agility: Continuously builds knowledge of analog circuit technologies, architectures, process technologies, tools, and design methodologies.
  • Innovation Mindset: Identifies opportunities to improve circuit performance, design methodologies, and engineering efficiency and applies new ideas to technical challenges.

Intel invests in our people and offers a complete and competitive package of benefits employees and their families through every stage of life. See Intel Benefits for more details.

Minimum Qualifications and Experience
  • Bachelor's degree in Electrical Engineering, Electronics, or a related field with 4+ years of experience in analog circuit design.
  • OR a Master's degree in the same fields with 2+ years of experience.
  • OR a PhD in the same field with 1+ of educational or work experience.
  • Your experience describe above must be in the following:
  • Analog simulation tools and methodologies.
  • Experience with circuit optimization techniques focused on power, area, timing, and yield.
  • Experience with advanced process nodes and their application in analog circuit design.
Preferred Qualifications and Experience
  • Analog/mixed-signal IC or SoC design in advanced CMOS process technologies.
  • Circuit design and optimization across multiple operating conditions and design corners.
  • Low-power circuit design, leakage reduction, or power optimization.
Why Join Intel?

Help engineer the circuits behind the next generation of computing. You'll tackle challenging analog and mixed-signal design problems in advanced process technologies while collaborating with experts across architecture, circuit design, and layout. Your work will directly influence the power, performance, reliability, and efficiency of future Intel products.

Job Type: Experienced Hire Shift: Shift 1 (United States of America) Primary Location: US, Oregon, Hillsboro Additional Locations:

Posting Statement

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

Position of Trust N/A

Benefits We offer

We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock bonuses, and benefit programs which include health, retirement, and vacation. Find out more about the benefits of working at Intel.

Annual Salary Range

Annual Salary Range for jobs which could be performed in the US: $122,440.00-232,190.00 USD

The range displayed on this job posting reflects the minimum and maximum target compensation for the position across all US locations. Within the range, individual pay is determined by work location and additional factors, including job-related skills, experience, and relevant education or training. Your recruiter can share more about the specific compensation range for your preferred location during the hiring process.

Work Model for this Role

This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site.

  • Job posting details (such as work model, location or time type) are subject to change.
  • ADDITIONAL INFORMATION: Intel is committed to Responsible Business Alliance (RBA) compliance and ethical hiring practices.
  • We do not charge any fees during our hiring process.
  • Candidates should never be required to pay recruitment fees, medical examination fees, or any other charges as a condition of employment.
  • If you are asked to pay any fees during our hiring process, please report this immediately to your recruiter.
  • Intel's official careers website.
  • Find your next job and take on projects that shape tomorrow's technology.
  • Benefits Internships Life at Intel Locations Recruitment Process
Get your free, confidential resume review.

or drag and drop your file here.

Similar jobs

Similar jobs worth comparing

Analog Engineer
Analog Engineer

Intel • Austin (TX)

On-site
USD 142,000 - 269,000
Analog Engineer
Analog Engineer

Intel • Phoenix (AZ)

On-site
USD 142,000 - 269,000
Stock bonuses
Health benefits
Retirement plan
+1
Analog Engineer
Analog Engineer

Intel • Hillsboro (OR)

On-site
USD 142,000 - 269,000
Stock bonuses
Health benefits
Retirement plan
+1
Analog Engineer
Analog Engineer

Intel • Santa Clara (CA)

On-site
USD 142,000 - 269,000
Stock bonuses
Health benefits
Retirement plan
+1
Silicon/Electrical Validation Engineer
Silicon/Electrical Validation Engineer

Intel Corporation • Hillsboro (OR)

On-site
USD 106,000 - 200,000
Stock bonuses
Health benefits
Hybrid work model
+1
Senior CPU Physical Design Engineer
Senior CPU Physical Design Engineer

Intel • Austin (TX)

On-site
USD 164,470 - 269,100
Stock bonuses
Health insurance
Retirement plan
+1
Mid-level Physical Design Engineer CPU
Mid-level Physical Design Engineer CPU

Intel Corporation • Hillsboro (OR)

On-site
USD 122,000 - 232,000
IP Design Verification Engineer
IP Design Verification Engineer

Intel Corporation • Hillsboro (OR)

On-site
USD 106,000 - 200,000
Health insurance
Stock bonuses
Retirement plan
+1
CPU Circuit Design Engineer
CPU Circuit Design Engineer

Intel Corporation • Austin (TX)

Hybrid
USD 142,000 - 269,000
Stock bonuses
Health benefits
Retirement plan
+1
Physical Design Engineer
Physical Design Engineer

Intel • Phoenix (AZ)

On-site
USD 91,000 - 149,000
Stock bonuses
Health benefits
Retirement plan