SLT Program Manager

Broadcom

Irvine (CA)

On-site

USD 129,000 - 207,000

Full time

2 days ago
Be an early applicant
Application generator

Don’t send a generic resume — generate a resume and cover letter tailored to this exact role.

Get past ATS filters

Benefits offered by this job

Medical
Dental
Vision
401K
ESPP
EAP
Paid holidays
Paid leave

Job summary

Broadcom in Irvine, CA is seeking a System Level Test Program Manager to own SLT program execution for multiple XPU customer programs across a distributed US-Asia footprint, balancing delivery with innovation. You will manage schedules, yield, and cost while partnering with Asia test operations and leading on-site production activities.

Responsibilities include weekly status reviews, risk mitigation, translating customer specs into SLT plans, coordinating cross‑timezone teams, and occasional

Qualifications

  • Bachelor's degree and 12+ years of related experience.
  • 9+ years in semiconductor test engineering or test operations (SLT, probe test, or production test).
  • 3-5 years in program or operations leadership (with schedule, cost, or quality accountability).
  • Hands-on expertise in ATE programming, test methodology, yield debugging, and SLT tool flows.
  • Demonstrated success shipping 2+ high-volume programs from silicon bring-up through ramp.
  • Experience working with cross-geographic or distributed teams; comfort with asynchronous collaboration and time zone management.
  • Strong project management discipline: risk tracking, escalation, forecasting, decision documentation.
  • Proficiency with test data analysis, yield correlation, and statistical methods.
  • Willingness and ability to travel internationally (Asia production sites).
  • Excellent communication skills with engineers, operations teams, customers, and leadership.

Responsibilities

  • Own end-to-end SLT execution for multiple concurrent XPU programs through silicon bring-up, production ramp, and sustained 100% volume operations.
  • Drive weekly program status, risk tracking, and customer commitments; escape blockers to Senior Management within 24 hours with recommended mitigation.
  • Translate customer test specifications, quality gates, and margining requirements into actionable SLT plans; own electrical test coverage sign-off and escape rate targets.
  • Manage portfolio prioritization when programs compete for resources (equipment, site capacity, engineer time); present trade-off options and risks to director for conflict resolution.
  • Conduct customer program reviews, status updates, and escalation communication; own SLT portion of customer commitments.
  • Travel to Asia production sites couple times a year to manage test floor execution, resolve operational blockers, and ensure quality/schedule adherence.
  • Forecast SLT capacity requirements, drive equipment utilization optimization, and manage shift planning across US R&D and Asia production sites.
  • Partner with Ops manager on sustained production operations.
  • Establish SLT quality gates, data integrity audits, and escalation protocols for Asia production sites.
  • Drive equipment maintenance scheduling, spare parts inventory management, and tooling readiness to maximize SLT test floor uptime and minimize operational downtime.
  • Evaluate and pilot new test techniques (advanced margining, Vmin stress, multi-site protocols) in partnership with Design/DFT teams.
  • Lead transition of new test methodologies from R&D (US) to production (Asia); drive pilot design, runoff, and full deployment.
  • Influence ATE equipment roadmap and automation tooling; assess new equipment investments and ROI for SLT operations.
  • Mentor engineers on advanced test methodologies and drive capability growth in distributed team.
  • Contribute to post-silicon debug and yield correlation analysis; own SLT test-related root cause investigations.
  • Identify, track, and prioritize risks across schedule, yield, capacity, and equipment; assess risk working with owners and target closure.
  • Lead root-cause analysis on yield misses, test escapes, and schedule delays; own corrective action closure and prevention planning.
  • Partner with Design/DFT on testability and early-silicon yield correlation; surface test bottlenecks before they cascade.
  • Coordinate with Manufacturing and Logistics on device staging, test scheduling, and shipment readiness.
  • Work with Quality/Reliability on escape analysis and early-life failure investigation.
  • Drive SLT yield improvement initiatives and Defective Parts Per Million (DPPM) reduction targets by partnering with test, design, and manufacturing teams to drive continuous quality enhancements

Skills

Program management
Semiconductor test
Test methodology
ATE programming
Yield debugging
Cross-timezone collaboration

Education

Bachelors degree

Tools

Test equipment
Test data analysis tools

Job description

Job Description

The System Level Test Program Manager owns SLT program execution for multiple concurrent XPU customer programs across a distributed US-Asia footprint, balancing real-time program delivery with technical innovation. This role combines program management accountability (schedule, yield, cost), on-site production leadership (partnering with Asia test operations), and a technical engineering depth (test methodology and equipment evaluation). Success requires customer management, relentless prioritization under pressure, cross-timezone coordination, and occasional travel to Asia production sites.

Key Responsibilities
Program Management & Multi-Customer Execution
  • Own end-to-end SLT execution for multiple concurrent XPU programs through silicon bring-up, production ramp, and sustained 100% volume operations
  • Drive weekly program status, risk tracking, and customer commitments; escape blockers to Senior Management within 24 hours with recommended mitigation
  • Translate customer test specifications, quality gates, and margining requirements into actionable SLT plans; own electrical test coverage sign-off and escape rate targets
  • Manage portfolio prioritization when programs compete for resources (equipment, site capacity, engineer time); present trade‑off options and risks to director for conflict resolution
  • Conduct customer program reviews, status updates, and escalation communication; own SLT portion of customer commitments
Production Operations & Asia Site Leadership
  • Travel to Asia production sites couple times a year to manage test floor execution, resolve operational blockers, and ensure quality/schedule adherence
  • Forecast SLT capacity requirements, drive equipment utilization optimization, and manage shift planning across US R&D and Asia production sites
  • Partner with Ops manager on sustained production operations
  • Establish SLT quality gates, data integrity audits, and escalation protocols for Asia production sites
  • Drive equipment maintenance scheduling, spare parts inventory management, and tooling readiness to maximize SLT test floor uptime and minimize operational downtime
Test Methodology & Equipment Innovation
  • Evaluate and pilot new test techniques (advanced margining, Vmin stress, multi-site protocols) in partnership with Design/DFT teams
  • Lead transition of new test methodologies from R&D (US) to production (Asia); drive pilot design, runoff, and full deployment
  • Influence ATE equipment roadmap and automation tooling; assess new equipment investments and ROI for SLT operations
  • Mentor engineers on advanced test methodologies and drive capability growth in distributed team
  • Contribute to post-silicon debug and yield correlation analysis; own SLT test-related root cause investigations
Cross-Functional Collaboration & Risk Management
  • Identify, track, and prioritize risks across schedule, yield, capacity, and equipment; assess risk working with owners and target closure
  • Lead root-cause analysis on yield misses, test escapes, and schedule delays; own corrective action closure and prevention planning
  • Partner with Design/DFT on testability and early-silicon yield correlation; surface test bottlenecks before they cascade
  • Coordinate with Manufacturing and Logistics on device staging, test scheduling, and shipment readiness
  • Work with Quality/Reliability on escape analysis and early-life failure investigation
  • Drive SLT yield improvement initiatives and Defective Parts Per Million (DPPM) reduction targets by partnering with test, design, and manufacturing teams to drive continuous quality enhancements
Required Qualifications
  • Bachelors and 12+ years of related experience
  • 9+ years in semiconductor test engineering or test operations (SLT, probe test, or production test)
  • 3-5 years in program or operations leadership (with schedule, cost, or quality accountability)
  • Hands-on expertise in ATE programming, test methodology, yield debugging, and SLT tool flows
  • Demonstrated success shipping 2+ high-volume programs from silicon bring-up through ramp
  • Experience working with cross-geographic or distributed teams; comfort with asynchronous collaboration and time zone management
  • Strong project management discipline: risk tracking, escalation, forecasting, decision documentation
  • Proficiency with test data analysis, yield correlation, and statistical methods
  • Willingness and ability to travel internationally (Asia production sites)
  • Excellent communication skills with engineers, operations teams, customers, and leadership
Preferred Qualifications
  • Deep experience with XPU, high-performance computing, or networking ASICs
  • Familiarity with 3nm or advanced process nodes
  • Background in hyperscaler or cloud customer environments (understanding urgency and risk tolerance)
  • Track record evaluating and implementing new test technologies or ATE equipment
  • Experience with advanced test techniques (margining, Vmin, in-circuit stress, multi-site)
  • On-site production operations or factory management experience
  • Exposure to offshore team management or time zone span management
  • Knowledge of test software stacks and automation frameworks
  • Basic Six Sigma or process improvement certification
Compensation And Benefits

The annual base salary range for this position is USD 129,400.00 To USD 207,000.00

As a valued member of our team, you'll be eligible for a discretionary annual bonus and the opportunity to receive not only a competitive new hire equity grant, but also annual equity awards, connecting your success directly to the company's growth. All subject to relevant plan documents and award agreements.

  • Medical, dental and vision plans
  • 401(K) participation including company matching
  • Employee Stock Purchase Program (ESPP)
  • Employee Assistance Program (EAP)
  • Company paid holidays
  • Paid sick leave and vacation time
  • The company follows all applicable laws for Paid Family Leave and other leaves of absence

R027172

Get your free, confidential resume review.

or drag and drop your file here.

Similar jobs

Similar jobs worth comparing

SLT Program Manager
SLT Program Manager

Broadcom Inc. • Irvine (CA)

On-site
USD 129,000 - 207,000
Medical, dental and vision plans
401(k) with company matching
ESPP
+1
SLT Program Manager
SLT Program Manager

Front Door Defense • Irvine (CA), Northern (KY)

Hybrid
USD 129,000 - 207,000
Discretionary annual bonus
Equity grants
Comprehensive benefits
Staff SLT Test Engineer
Staff SLT Test Engineer

Graphcore • Austin (TX)

On-site
USD 110,000 - 140,000
Flexible working
Medical, dental and vision coverage
401(k) retirement plan
Global System-Level Test Program Lead
Global System-Level Test Program Lead

Broadcom • Irvine (CA)

On-site
USD 129,000 - 207,000
Medical
Dental
Vision
+5
Senior SLT Test Engineer
Senior SLT Test Engineer

Graphcore • Austin (TX)

On-site
USD 110,000 - 160,000
Global SLT Program Manager: Semiconductor Test & Production
Global SLT Program Manager: Semiconductor Test & Production

Broadcom Inc. • Irvine (CA)

On-site
USD 129,000 - 207,000
Medical, dental and vision plans
401(k) with company matching
ESPP
+1
SLT Test Engineer
SLT Test Engineer

Advanced Micro Devices • Austin (TX)

On-site
USD 90,000 - 130,000
SLT Test Engineer
SLT Test Engineer

Advanced Micro Devices, Inc. • Austin (TX)

Hybrid
USD 110,000 - 170,000
Software Test Engineer
Software Test Engineer

advantestcareers • Lake Forest (CA)

On-site
USD 120,000 - 160,000
Field Application Engineer - System Level Testing (SEG; San Jose, CA) (San Jose, CA, US)
Field Application Engineer - System Level Testing (SEG; San Jose, CA) (San Jose, CA, US)

LitePoint • San Jose (CA)

On-site
USD 139,000 - 223,000