Silicon Validation Engineer 2

Tessolve; San Jose (CA); Hybrid; USD 90,000 - 130,000; Full time

Job summary

Tessolve in San Jose, CA is seeking a Test Engineer with 3–8 years to develop test programs for Digital, PMIC, RF and mixed-signal products using Advantest 93K SMT8, and to work with design engineers on first silicon debug, characterization and production release.

Candidates should have hands-on bench instrumentation experience, strong analog and digital knowledge, and excellent communication to collaborate with engineering and quality teams.

Qualifications

• Graduates from Degree in Electronics / Electrical Engineering
• Minimum 2-7 yrs relevant experience on the Test Engineering is preferred
• Hands on experience on Advantest 93K ATE SMT8 is must.
• Usage of bench instrumentation for characterization of ICs
• Good Knowledge of analog and digital electronics is desired.
• Strong analytical and problem-solving ability with desire to perform hands-on work within a lab environment is a must.
• Very strong verbal and written communication skills and able to work independently

Responsibilities

• Test program development for Digital, PMIC, RF & Mixed Signal products on Bench and (or) ATE primarily on Advantest 93k - SmarTest 7, SmarTest 8
• Work closely with the design engineers on the first silicon debug, device characterization, test program bring up and production release activities
• Debug of digital vectors (JTAG/SCAN/ATPG / Functional / Mbist) and Device characterization across PVT (Process, Voltage and Temperature)
• Understanding and experience in characterization of RF, PMIC or Mixed Signal IP (ADC, DAC, PLL etc.)
• Involve on test program hand off, production release, yield improvement, and test time reduction
• High level of collaboration and interaction with different Product Engineering, Design Engineering, Quality Engineering, and Foundry Engineering teams.

Skills

Test program development

Bench instrumentation

RF knowledge

Digital vectors debug

Data analysis

Independent worker

Education

Electronics / Electrical Engineering degree

Tools

Advantest 93K ATE

SmARTest 7/8

Job description

San Jose, San Jose, California, United States

3 - 8 Years

Regular Employee - Probation

Job Description

Job Summary

• Test program development for Digital, PMIC, RF & Mixed Signal products on Bench and (or) ATE primarily on Advantest 93k - SmarTest 7, SmarTest 8


• Work closely with the design engineers on the first silicon debug, device characterization, test program bring up and production release activities


• Debug of digital vectors (JTAG/SCAN/ATPG / Functional / Mbist) and Device characterization across PVT (Process, Voltage and Temperature)


• Understanding and experience in characterization of RF, PMIC or Mixed Signal IP (ADC, DAC, PLL etc.)


• Involve on test program hand off, production release, yield improvement, and test time reduction


• High level of collaboration and interaction with different Product Engineering, Design Engineering, Quality Engineering, and Foundry Engineering teams.

Job Requirements

• Graduates from Degree in Electronics / Electrical Engineering


• Minimum 2-7 yrs relevant experience on the Test Engineering is preferred


• Hands on experience on Advantest 93K ATE SMT8 is must.


• Usage of bench instrumentation for characterization of ICs


• Good Knowledge of analog and digital electronics is desired.


• Strong analytical and problem-solving ability with desire to perform hands-on work within a lab environment is a must.


• Very strong verbal and written communication skills and able to work independently

Job Snapshot

Updated Date

04-09-2026

Job ID

JOB_1120

Department

Location

Location San Jose, San Jose, California, United States