Silicon Validation Engineer

Agility Partners; Hillsboro (OR); On-site; USD 110,000 - 160,000; Full time

Job summary

Agility Partners is seeking a Silicon Validation Engineer for a Fortune 15 company in the greater Seattle area. You will drive validation of SoC features, high-speed interfaces, and system-level tests in a lab environment.

You will collaborate with hardware, firmware, and software teams, writing tests in Python/C/C++, and debugging issues using oscilloscopes, logic analyzers, and JTAG. Onsite work five days a week is expected.

Qualifications

• 3+ years in silicon validation, system-level testing, or hardware debugging.
• Hands-on experience with PCIe, CXL, high-speed I/O and related interfaces.
• Proficiency in Python/C/C++ scripting and test automation; familiarity with Verilog.

Responsibilities

• Develop and execute silicon validation test plans for SoC features and subsystems.
• Run, maintain, and monitor silicon system regressions; analyze results and report outcomes.
• Triage, isolate, and debug hardware/software issues for PCIe, CXL, SerDes, and network endpoints.
• Review system updates; participate in root-cause analyses across silicon, platform, firmware, and software.

Skills

Python

C

C++

Verilog

Education

Bachelor's degree in Electrical Engineering

Master's degree in Electrical/Computer Engineering

Tools

Oscilloscopes

Logic Analyzers

JTAG

BERT

Job description

Agility Partners is seeking a qualified Silicon Validation Engineer to join a Fortune 15 company based in the greater Seattle area. This is an exciting opportunity to work on a state-of-the-art compute System-on-Chip (SoC) that powers cloud infrastructure. The ideal candidate will apply hands-on hardware validation, electrical engineering, and debugging expertise to ensure high-speed I/O interfaces and silicon subsystems perform reliably. This role offers the opportunity to solve complex engineering challenges while contributing to the validation of advanced computing technologies.

What You'll Do

• Develop and execute silicon validation test plans for SoC features and subsystems, focusing on functional, electrical, power, and performance validation.
• Run, maintain, and monitor silicon system regressions, analyze test results, and report validation outcomes to engineering teams.
• Triage, isolate, and debug hardware and software issues involving PCIe, CXL, high-speed I/O, SerDes, and network or storage endpoints using industry-standard debugging tools.
• Review and validate system updates from engineering teams, collaborate on root-cause analysis, and verify system-level functionality across silicon, platform, firmware, and software components.

The Ideal Candidate

• Bachelor's or master's degree in Electrical Engineering, Computer Engineering, or a related technical field.
• 3+ years of hands-on experience in silicon validation, system-level testing, or hardware debugging, with an engineering-level understanding of SoC architecture and validation principles.
• 3+ years of experience with high-speed interfaces and system-level technologies, including PCIe, CXL, I/O, and network or storage endpoints.
• 3+ years of electrical engineering or validation experience involving SerDes, high-speed I/O, or related electrical interfaces.
• Proficiency in Python, C, or C++ for scripting, test automation, and validation workflows, with some familiarity with Verilog.
• Experience with hardware and software debugging tools such as oscilloscopes, logic analyzers, JTAG, and BERT, along with an understanding of firmware, BIOS, power management, and board-level schematics.
• Strong analytical, troubleshooting, and communication skills, with the ability to work onsite five days per week in a laboratory environment and collaborate effectively with cross-functional engineering teams.