Silicon Physical Design Engineer II

Iron Systems, Inc; Sunnyvale (CA); On-site; USD 173,000 - 249,000; Full time

Job summary

An innovative company is seeking a Silicon Physical Design Engineer II to join their dynamic team in Sunnyvale. This role involves designing complex layouts for mixed signal and analog circuits, utilizing advanced EDA tools like Virtuoso and Calibre. The ideal candidate will have a strong background in analog layout design and physical verification processes. You will collaborate closely with circuit designers to ensure high-quality outputs and contribute to exciting projects in the ARVR technology space. If you are passionate about cutting-edge design and eager to make an impact, this is the perfect opportunity for you.

Qualifications

• 5+ years of experience in analog mixed signal layout design.
• Strong understanding of analog layout design and EDA tools.
• Experience in physical verification and layout integration.

Responsibilities

• Design complex layouts for mixed signal and analog circuits.
• Run and fix physical design verification and reliability checks.
• Collaborate with circuit designers for layout reviews.

Skills

Analog layout design

Mixed signal layout design

Physical verification (DRC, LVS)

EDA tools (Virtuoso, Calibre)

Block-level layout execution

Chip-level layout execution

Education

Bachelor in Electrical/Computer Engineering

Tools

Virtuoso

Calibre

Job description

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Iron Systems is an innovative, customer-focused provider of custom-built computing infrastructure platforms such as network servers, storage, OEM/ODM appliances & embedded systems. For more than 15 years, customer have trusted us for our innovative problem solving combined with holistic design, engineering, manufacturing, logistic and global support services.

Job Title: Silicon Physical Design Engineer II

Location: US - CA - Sunnyvale

Job Description

• Strong understanding in the analog layout design
• Experience with block level layout floor planning and execution
• Experience working with most EDA tools like virtuoso layout editor, Calibre DRC & LVS, Totem/Voltus
  
  

Duties:

• Design complex layout for mixed signal and analog circuit in deep sub-micron CMOS technologies
• Work with circuit design to floor plan and complete the layout
• Run and fix complete set of physical design verification and reliability verification
• Review and analyze the layout with the circuit designers
• Layout integration and final verification for tape out
  
  

Must Have:

• 5 years of relevant analog mixed signal layout design experience
• Experience in running physical verification such as DRC, LVS, ERC, LVSERC, Antenna, Density, and LUP
• Experience in Block-level and chip level layout execution
• Experience in analog layout floor planning
  
  

Wish List/ Nice to Have:

• skill programming experience
  
  

Education

• Bachelor degree in Electrical/Computer Engineering or Computer Science is a plus
  
  

Must-have HARD skills:

• Analog and mixed signal design experiences
• Virtuoso and calibre
  
  

Good to have skills:

• Top down and bottom-up floor plan experiences
• Full chip integration experiences
• EMIR, DFM, ERC, PERC experiences
  
  

Story Behind the Need – Business Group & Key Projects:

• To support AMS research program in AR
  
  

Compelling story:

• Plans to extend with good performance
• Excitement to get explore and learn about ARVR technology
• Opportunity to work on advance process nodes from TSMC, GF, and Samsung
  
  

Typical Day in the Role:

• IP layout development daily

Seniority level

• Seniority level

  Mid-Senior level

Employment type

• Employment type

  Full-time

Job function

• Job function

  Engineering and Information Technology

• Industries

  IT Services and IT Consulting

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