Silicon Performance Architect, Reality Labs

Meta; San Diego (CA); On-site; USD 180,000 - 260,000; Full time

Job summary

Meta Reality Labs is seeking an experienced architect for the SoC Performance team to lead performance modeling, workload profiling, and analysis across advanced AI-enabled wearables. You will shape performance experiments, decompose problems, and document insights for engineers and partners.

Ideal candidates have 8+ years in performance modeling, strong C/C++ or SystemC experience, and a track record with cycle-accurate models, RTL verification, and AI-driven workflow optimization.

Qualifications

• Bachelor's degree in Computer Science, Computer Engineering, relevant technical field, or equivalent practical experience.
• 8+ years of experience in creating performance models using C/C++ or SystemC.
• Experience with SoC architecture, NoCs, memory sub-system, QoS, and heterogeneous compute principles.
• Experience with scripting, infrastructure, automation, and visualization using Python.
• Experience with power concepts and trade-offs.
• Experience deconstructing technical problems, designing performance experiments, analyzing/visualizing data, and sharing detailed analysis in the form of documentation with peers and cross-functional partners.
• MS degree in EE/CS or equivalent experience.
• Experience working with cycle-accurate performance models and frameworks for performance architecture evaluations of various SoC components (Accelerators, NoC, DRAM, MMU, etc.).
• Experience with bare-metal programming, micro-benchmarking, performance instrumentation, Simpoints, etc.
• Experience with RTL design verification.
• Demonstrated ability to integrate AI tools to optimize/redesign workflows and drive measurable impact (e.g., efficiency gains, quality improvements).

Responsibilities

• Lead performance modeling, correlation, workload profiling, and analysis efforts.
• Collaborate with cross-functional teams to drive performance improvements for SoCs.
• Document findings and present detailed analyses to peers and partners.

Skills

Performance modeling

SoC architecture

NoCs

Memory sub-system

QoS

Heterogeneous compute

Python scripting

Power concepts

Data analysis

Cross-functional communication

Cycle-accurate models

Bare-metal programming

RTL verification

AI tools integration

Education

Bachelor's degree in Computer Science or Computer Engineering

MS degree in EE/CS or equivalent

Tools

SystemC

Job description

Reality Labs focuses on delivering Meta's vision through creating advanced AI-enabled wearables. The compute performance and power efficiency requirements of wearables require custom silicon. The custom silicon team within Reality Labs is driving the state-of-the-art forward with breakthrough work in AI, augmented reality, computer vision, machine learning, graphics, displays, and sensors. Our chips will enable wearable devices where our real and virtual world will mix and match throughout the day. We believe the only way to achieve our goals is to look at the entire stack, from transistors, through architecture, firmware, and algorithms.

As an architect on the the SoC Performance team within Reality Labs, you will play a key role in leading performance modeling, correlation, workload profiling, and analysis efforts.

• Bachelor's degree in Computer Science, Computer Engineering, relevant technical field, or equivalent practical experience8+ years of experience in creating performance models using C/C++ or SystemCExperience with SoC architecture, NoCs, memory sub-system, Quality of Service (QoS), and heterogeneous compute principles
• Experience with scripting, infrastructure, automation, and visualization using Python
• Experience with power concepts and trade-offs
• Experience deconstructing technical problems, designing performance experiments, analyzing/visualizing data, and sharing detailed analysis in the form of documentation with peers and cross-functional partners MS degree in EE/CS or equivalent experience
• Experience working with cycle-accurate performance models and frameworks for performance architecture evaluations of various SoC components (Accelerators, NoC, DRAM, MMU, etc.)
• Experience with bare-metal programming, micro-benchmarking, performance instrumentation, Simpoints, etc
• Experience with RTL design verification
• Demonstrated ability to integrate AI tools to optimize/redesign workflows and drive measurable impact (e.g., efficiency gains, quality improvements)