Silicon Debug Engineer

Apple Inc.; Santa Clara (CA); On-site; USD 147,400 - 272,100; Full time

Benefits offered by this job

Comprehensive medical and dental coverage

Retirement benefits

Educational reimbursement

Job summary

Apple Inc. is seeking a passionate engineer to join our Silicon Debug group in Santa Clara, California. You’ll solve complex silicon failures and ensure high-quality ASICs for millions of customers. This role involves working closely with various engineering teams to drive the silicon debug effort from initial bring-up to volume ramp, while employing advanced failure analysis techniques.

Your contributions will directly impact product reliability and performance, making this role crucial as we innovate at scale. Join us at Apple, where your expertise will help shape the future of technology.

Qualifications

• BSEE/MSEE required.
• Experience in silicon debug and custom circuit design preferred.
• Ability to analyze large datasets and conduct structured experiments.

Responsibilities

• Drive the silicon debug effort and own failure isolation.
• Work with circuit design teams for silicon characterization.
• Engage with PE / DFT / FA teams for characterization strategies.

Skills

Silicon debug

Failure analysis techniques

SPICE simulation

Python scripting

Education

BSEE/MSEE

Tools

Electrical failure analysis (eFA) tools

Physical failure analysis (pFA) tools

CAD automation tools

Job description

Santa Clara, California, United States Hardware

Do you have a passion for solving the hardest problems in silicon? Do you thrive at the intersection of circuit theory, device physics, and hands‑on failure investigation? As part of our Silicon Debug group, you'll take complex, often elusive silicon failures and systematically uncover their root cause — from electrical characterization all the way down to physical analysis. You and your team will apply deep engineering fundamentals and cutting‑edge failure analysis techniques to enable product ramp at scale. Your efforts will directly impact the quality and reliability of state‑of‑the‑art ASICs that power experiences for millions of customers worldwide. Join us, and you'll play a central role in ensuring the silicon we build is everything it needs to be.

Description

Imagine yourself at the center of our SoC bring‑up and product ramp effort, collaborating across circuit design, process engineering, DFT, and failure analysis teams — with a critical impact on getting functional products to millions of customers quickly.

Responsibilities

• Drive the silicon debug effort involving custom circuits from initial bring‑up through volume ramp, owning failure isolation from symptom to root cause.
• Work with circuit design teams to define silicon characterization and debug requirements for test chips and product chips.
• Engage with PE / DFT / FA teams to plan and execute electrical and physical characterization strategies.
• Perform design analysis, modeling/simulation, SPICE simulation, statistical analysis, and silicon bring‑up to understand and reproduce failure signatures.
• Work closely with systems and lab teams to reproduce circuit‑level behavior using MBIST, functional diagnostics, and characterization structures.
• Plan and interpret FA analysis — translating electrical failure signatures into targeted physical analysis strategies and understanding how FA technique choices impact observable circuit behavior.
• Leverage eFA and pFA techniques including Dynamic Laser Stimulus (DLS), Lock‑in Thermography (LIT), Nanoprobe, Focused Ion Beam (FIB), TEM/SEM, EMMI, and Physical Failure Analysis (PFA) to identify defect mechanisms and localize failures to specific circuit nodes.
• Understand the circuit impact of FA techniques — including how photon emission, voltage contrast, charge injection, sample preparation, and probe‑induced perturbations may influence or mask failure modes during analysis.

Minimum Qualifications

• BSEE/MSEE

Preferred Qualifications

• Experience in one or more of the following areas: SRAM circuits, custom circuit design, silicon debug.
• Experience in design or debug of low‑voltage / low‑power custom circuits.
• Deep understanding of deep‑submicron device physics, leakage mechanisms, and technology interactions with device behavior.
• Solid understanding of device matching, device noise sources (1/f, thermal), extrinsic noise sources (supply noise, jitter), and their impact on high‑precision circuits.
• Familiarity with electrical failure analysis (eFA) techniques and physical failure analysis (pFA) workflows, and the ability to plan FA strategies based on electrical debug data.
• Understanding of Dynamic Lock‑in Thermography (DLS) and Lock‑in Thermography (LIT) for localization of resistive and leakage defects, including their sensitivity limits and how thermal signatures correlate to specific circuit fault modes.
• Knowledge of Nanoprobe techniques for electrical probing of deep‑submicron nodes, and appreciation of how probe contact, voltage bias, and electron beam exposure can perturb sensitive analog or memory circuits.
• Awareness of how physical sample preparation steps (deprocessing, FIB cross‑section, delayering) can alter or destroy evidence of electrical failures, and how to coordinate FA plans that preserve failure signatures.
• Ability to interpret FA results (photon emission maps, OBIRCH, thermal maps, TEM/SEM imagery) in the context of circuit topology and failure electrical signatures.
• Ability to conduct structured experiments during silicon debug, gather and analyze large datasets, and utilize scripting to support efficient handling of debug data.
• Proficiency in scripting languages (Python, Perl, or others) and CAD automation tools.
• Knowledge of industry‑standard circuit design and simulation tools.

At Apple, base pay is one part of our total compensation package and is determined within a range. This provides the opportunity to progress as you grow and develop within a role. The base pay range for this role is between $147,400 and $272,100, and your base pay will depend on your skills, qualifications, experience, and location.

Apple employees also have the opportunity to become an Apple shareholder through participation in Apple’s discretionary employee stock programs. Apple employees are eligible for discretionary restricted stock unit awards, and can purchase Apple stock at a discount if voluntarily participating in Apple’s Employee Stock Purchase Plan. You’ll also receive benefits including: comprehensive medical and dental coverage, retirement benefits, a range of discounted products and free services, and for formal education related to advancing your career at Apple, reimbursement for certain educational expenses — including tuition. Additionally, this role might be eligible for discretionary bonuses or commission payments as well as relocation.

Note: Apple benefit, compensation and employee stock programs are subject to eligibility requirements and other terms of the applicable plan or program.

Apple is an equal opportunity employer that is committed to inclusion and diversity. We seek to promote equal opportunity for all applicants without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, veteran status, or other legally protected characteristics.

At Apple, we believe accessibility is a fundamental human right. You’ll find that idea reflected in everything here — in our culture, our benefits and our digital tools. By welcoming as many perspectives as possible, we help you build a career where you feel like you belong.