Signal Integrity & Power Integrity Principal Engineer

191 Altera Corporation; San Jose (CA); On-site; USD 187,000 - 270,000; Full time

Job summary

191 Altera Corporation is seeking an experienced Signal Integrity & Power Integrity Engineer in San Jose, California. The role involves leading the design, verification, and optimization of high-speed interconnects across various architectures. Candidates should have over 15 years of experience and expertise in SI/PI, backed by a Bachelor’s degree in Electrical Engineering.

The position offers a competitive salary range of $187,000 - $270,000, dependent on experience. Applicants will play a crucial role in advancing innovative technologies within an agile, collaborative environment.

Qualifications

• 15+ years of hands-on experience in Signal Integrity and Power Integrity engineering.
• Deep expertise in high-speed digital interfaces and SI/PI fundamentals.
• Proficiency with industry-standard simulation tools.

Responsibilities

• Lead end-to-end signal and power integrity design for IC packages.
• Define and deploy best SI/PI simulation methodologies.
• Collaborate across design teams for optimized electrical solutions.

Skills

Signal Integrity engineering

Power Integrity engineering

High-speed digital interfaces

Electromagnetics

Circuit analysis

Scripting (Python, MATLAB)

Education

Bachelor’s degree in Electrical Engineering

Master’s or PhD in Electrical Engineering

Tools

ANSYS HFSS

Synopsys HSPICE

Cadence Sigrity

Keysight ADS

Mentor Graphics

Cadence Allegro

Job description

About Altera

At Altera™, our independence as the world’s largest pure‑play FPGA solutions provider gives us the focus, speed, and agility to innovate without compromise. With more than four decades of industry‑leading FPGA expertise, our singular mission is to deliver the programmable technologies that help customers differentiate, innovate, and scale across rapidly evolving markets like AI, cloud, networking, and edge. As an independent company, we move faster, invest deeper, and partner more closely—empowering our teams to drive breakthrough innovation and shape the future of the FPGA industry.

About the Role

We are seeking a highly experienced Signal Integrity & Power Integrity (SI/PI) Engineer with 15+ years of industry experience to lead the design, verification, and optimization of high‑speed interconnects across silicon, IC package, and board‑level architectures.

Key Responsibilities

• Lead end‑to‑end signal and power integrity design for IC packages, validation platforms, and development kit hardware to achieve best‑in‑class electrical performance and reliability.
• Define and deploy best‑in‑class SI/PI simulation methodologies, leveraging advanced EDA tools and AI‑assisted techniques to improve accuracy, efficiency, and product quality.
• Perform detailed simulation, review, and trade‑off analysis of package and board designs to ensure scalable and robust electrical solutions.
• Diagnose and resolve complex system‑level SI/PI challenges spanning electrical, mechanical, thermal, and manufacturing constraints.
• Collaborate across silicon, package, and board design teams to define optimized electrical solutions that meet performance targets while minimizing product cost and maximizing customer competitiveness.
• Drive forward‑looking SI/PI technologies, including advanced and heterogeneous packaging solutions, to support and influence future product architectures.

Salary Range

Bay Area California only: $187,000 - $270,000 USD. Actual salary may vary based on factors such as location, experience, and training. Incentive opportunities are available based on individual and company performance.

Qualifications

• Bachelor’s degree in Electrical Engineering, Computer Engineering, or a related field, with a strong foundation in electromagnetics, circuit analysis, and signal processing.
• 15+ years of hands‑on experience in Signal Integrity and Power Integrity engineering across silicon, package, and board‑level designs.
• Deep expertise in high‑speed digital interfaces, SI/PI fundamentals, and power delivery network behavior.
• Proficiency with industry‑standard simulation and modeling tools such as ANSYS HFSS, Synopsys HSPICE, Cadence Sigrity, Keysight ADS, or equivalent platforms.
• Strong analytical skills to interpret, correlate, and validate simulation, design, and measurement data.
• Proven ability to solve complex, multi‑domain SI/PI problems with a structured and methodical approach.
• Hands‑on experience with silicon/package/board layout and design tools (e.g., Mentor Graphics, Cadence Allegro).
• Scripting and automation experience using Python, MATLAB, or similar languages is highly desirable.
• Preferred: Master’s or PhD in Electrical Engineering, Computer Engineering, or a related field.

Job Details

Job Type: Regular | Shift: Shift 1 | Primary Location: San Jose, California, United States

EEO Statement

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.