SerDes IP Systems Engineering Director

Cadence Design Systems, Inc.

San Jose (CA)

Vor Ort

USD 179.000 - 332.000

Vollzeit

14 Tage+

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Zusammenfassung

Cadence Design Systems, Inc. in San Jose, CA seeks a Director of SerDes IP Systems Engineering to lead the die-to-die interface IP team. You will drive system analysis, model development, and end-to-end link simulations while guiding packaging, signal integrity and customer support.

The role requires 10+ years in high-speed SerDes/PHYs, strong leadership, and advanced degrees in electrical engineering. Competitive salary, incentives and benefits accompany the position.

Qualifikationen

  • 10+ years of experience with high speed SerDes and PHYs.
  • Deep understanding of high speed SerDes architecture.
  • PhD or MS in Electrical/Computer Engineering (or similar).

Aufgaben

  • Develop statistical and linear systems analysis of the link and define design specifications.
  • Drive R&D to define models, microarchitecture, link budget and specs for D2D SerDes IP.
  • Develop infrastructure for robust product development, modeling, analysis and testing.
  • Lead end-to-end link simulations using MATLAB/Simulink/ADS.
  • Provide guidelines on signal and power integrity to customers.
  • Support customer package/board design and debugging as needed.
  • Guide package design based on in-package D2D link channel analysis.
  • Create technical specs, data sheets and application notes.

Kenntnisse

D2D SerDes
MATLAB
Simulink
ADS
Signal integrity
Power integrity
Leadership
Scripting (Python/Perl)

Ausbildung

PhD or MS in Electrical/Computer Engineering

Tools

MATLAB
Simulink
ADS
Perl

Jobbeschreibung

SAN JOSE

Full time

R52908

At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.

SerDes IP Systems Engineering Director Description:

This is a unique opportunity to join the rapidly growing Die-to-Die Interface IP team in the Silicon Solutions R&D Group at Cadence Design Systems. We are looking for a Systems Engineering Director who will be a key driver and contributor to the development of our advanced D2D SerDes IP products.This role involves leading the D2D Systems analysis team as well as contributing with hands on technical development.

Main Job Tasks and Responsibilities:
  • Develop statistical and linear systems analysis of the link, model nonidealities and determine design specifications for circuit designers
  • Key contributor and driver of the R&D team that defines, models and analyzes high performance D2D SerDes IP microarchitecture, link budget and specifications
  • Develop infrastructure to ensure robust product development, systems modeling analysis and testing
  • Drive and verify end-to-end link simulations using statistical and time-domain simulators (Simulink, ADS, etc.)
  • Develop and provide guidelines regarding signal integrity and power integrity to customers
  • Support customer package/board design and debug as necessary
  • Guide the package design team based on in-package D2D link channel analysis
  • Generate technical specification, data sheets, and application notes
  • Update R&D team with the latest standards developments, customer feedback and competitive analysis
Position Requirements:
  • 10+ years of experience working with high speed high performance SerDes and PHYs
  • Deep understanding of high speed SerDes architecture
  • Proficient in MATLAB, Simulink, ADS, or similar link analysis/statistical analysis tool
  • Strong coding skills for simulation and modelling, as well as data analysis
  • Strong mathematical skills, in particular relating to linear systems (Fourier analysis, filter theory, etc.)
  • Must have strong group presentation and leadership skills
  • PhD or M.S. in Electrical/Computer Engineering (or similar degree)
  • The ability to think through engineering systems end-to-end and identify bottlenecks and weak points.
  • Deep knowledge of communication systems fundamentals and wireline communications
  • Good experimental skills
  • Good knowledge of signal processing (DSP) algorithms and architecture.
  • Good working knowledge of physics of signal propagation
  • Good working knowledge of basic circuits
  • Experience generating systems or IBIS-AMI models
  • Experience using system simulation tools, especially Matlab, Perl, and other scripting tools
  • Demonstrated capacity to self-educate themselves to pick up new fields of expertise
  • D2D link experience is preferred but not required
  • Familiarity with emerging D2D standards such as UCIe is desired
  • Strong debug and problem-solving skills

The annual salary range for California is $178,500 to $331,500. You may also be eligible to receive incentive compensation: bonus, equity, and benefits. Sales positions generally offer a competitive On Target Earnings (OTE) incentive compensation structure. Please note that the salary range is a guideline and compensation may vary based on factors such as qualifications, skill level, competencies and work location. Our benefits programs include: paid vacation and paid holidays, 401(k) plan with employer match, employee stock purchase plan, a variety of medical, dental and vision plan options, and more.

We’re doing work that matters. Help us solve what others can’t.

Additional Jobs (https://cadence.wd1.myworkdayjobs.com/addl_jobs)

Equal Employment Opportunity Policy:

Cadence is committed to equal employment opportunity throughout all levels of the organization.

  • Read the policy(opens in a new tab) (https://www.cadence.com/content/dam/cadence-www/global/en_US/documents/company/careers/equal-employment-opportunity-policy.pdf)

We welcome your interest in the company and want to make sure our job site is accessible to all. If you experience difficulty using this site or to request a reasonable accommodation, please contact staffing@cadence.com.

Privacy Policy:

Job Applicant If you are a job seeker creating a profile using our careers website, please see the privacy policy(opens in a new tab) (https://www.cadence.com/en_US/home/privacy/privacy-policy.html) .

E-Verify Cadence participates in the

E-Verify program in certain U.S. locations as required by law. Download More Information on E-Verify (64K) (https://www.cadence.com/content/dam/cadence-www/global/en_US/documents/company/careers/e-verify-participation-poster.pdf)

Cadence plays a critical role in creating the technologies that modern life depends on. We are a global electronic design automation company, providing software, hardware, and intellectual property to design advanced semiconductor chips that enable our customers create revolutionary products and experiences.

Thanks to the outstanding caliber of the Cadence team and the empowering culture that we have cultivated for over 25 years, Cadence continues to be recognized by Fortune Magazine as one of the 100 Best Companies to Work For. Our shared passion for solving the world’s toughest technical challenges, our dedication to pushing the limits of the industry, and our drive to do meaningful work differentiates the people of Cadence.

Cadence is proud to be an equal opportunity employer. All qualified applicants will receive consideration for employment without regard to race, color, sex, age, national origin, religion, sexual orientation, gender identity, status as a veteran, basis of disability, or any other protected class.

Cadence is committed to creating a diverse environment and is proud to be an equal opportunity employer. All qualified applicants will receive consideration for employment without regard to race, color, sex, age, national origin, religion, sexual orientation, gender identity, status as a veteran, basis of disability, or any other protected class.

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