Senior Verification Engineer – High Speed Coherent Interconnect Hub

NVIDIA Corporation; Santa Clara (CA); Ibrido; USD 136.000 - 265.000; Tempo pieno

Vantaggi offerti da questo lavoro

Equity

Benefits package

Descrizione del lavoro

NVIDIA is seeking a motivated Senior Verification Engineer to join our Tegra SoC IP Verification team. You will define verification strategies, develop robust environments, and drive coverage closure for high-speed interconnect IP in multi-chip platforms.

You will collaborate across architecture, design, FPGA, emulation, software and post-silicon teams, with opportunities to influence signoff and system validation. The role requires 3+ years ASIC verification and strong SystemVerilog/UVM skills.

Competenze

• BS / MS or equivalent experience.
• 3+ years of ASIC verification experience with complex IPs or SoC subsystems.
• Strong background in SystemVerilog, UVM, constrained-random verification, and coverage-driven verification methodologies.
• Experience developing verification environments, checkers, assertions, and functional coverage.
• Strong debugging and problem-solving skills with industry-standard simulation and debug tools.

Mansioni

• Develop and maintain verification infrastructure, including testbenches, BFMs, checkers, monitors, scoreboards, assertions, and constrained-random stimulus.
• Define, review, and complete verification test plans for coherency protocol, ordering, error handling, performance, and other key IP features.
• Verify protocol compliance and interoperability across complex SoC and multi-chip interfaces.
• Develop and complete performance test plans to validate bandwidth, latency, QoS, and other performance requirements.
• Drive functional and code coverage closure and provide to verification signoff.
• Debug complex RTL and verification issues and work closely with architecture and design teams to drive them to resolution.
• Collaborate with FPGA, emulation, software, and post-silicon teams to support system validation and silicon bring-up.

Conoscenze

SystemVerilog

UVM

Constrained-random

Coverage-driven

Debugging

Python

Shell

Formazione

BS/MS or equivalent

Strumenti

BFMs

Monitors

Assertions

Scoreboards

Descrizione del lavoro

NVIDIA is seeking a motivated and creative Senior Verification Engineer to join our Tegra SoC IP Verification team. Our mission is to build the IP that enables the next generation of scalable, high-performance, multi-chip computing platforms. In this role, you will work closely with architecture and design teams to verify complex High Speed Coherent Interconnect Hub IP. You will help define verification strategies, develop robust verification environments, drive functional and performance verification, close coverage, and ensure high-quality design signoff. This position provides an opportunity to work on technologies at the heart of NVIDIA's next-generation computing platforms.

What You’ll Be Doing:

• Develop and maintain verification infrastructure, including testbenches, BFMs, checkers, monitors, scoreboards, assertions, and constrained-random stimulus.
• Define, review, and complete verification test plans for coherency protocol, ordering, error handling, performance, and other key IP features.
• Verify protocol compliance and interoperability across complex SoC and multi-chip interfaces.
• Develop and complete performance test plans to validate bandwidth, latency, QoS, and other performance requirements.
• Drive functional and code coverage closure and provide to verification signoff.
• Debug complex RTL and verification issues and work closely with architecture and design teams to drive them to resolution.
• Collaborate with FPGA, emulation, software, and post-silicon teams to support system validation and silicon bring-up.

What We Need to See:

• BS / MS or equivalent experience.
• 3+ years of ASIC verification experience with complex IPs or SoC subsystems.
• Strong background in SystemVerilog, UVM, constrained-random verification, and coverage-driven verification methodologies.
• Experience developing verification environments, checkers, assertions, and functional coverage.
• Strong debugging and problem-solving skills with experience using industry-standard simulation and debug tools.

Ways to Stand Out from the Crowd:

• Experience verifying high-speed coherent interconnects, NoCs, or other complex SoC infrastructure IP.
• Knowledge of coherent interconnect protocols and technologies such as CHI and AXI.
• Strong understanding of cache coherency, transaction ordering, and system-level data flows.
• Experience with performance verification, including bandwidth, latency, QoS, and traffic management.
• Strong scripting skills in Python, Perl, or Shell, along with excellent communication and collaboration skills.

With competitive salaries and a generous benefits package, NVIDIA is widely considered to be one of the technology world’s most desirable employers. We welcome you join our team with some of the most hard-working people in the world working together to promote rapid growth. Are you passionate about becoming a part of a best‑in‑class team supporting the latest in GPU and AI technology?

#LI-Hybrid

Your base salary will be determined based on your location, experience, and the pay of employees in similar positions. The base salary range is 136,000 USD - 218,500 USD for Level 3, and 168,000 USD - 264,500 USD for Level 4.

You will also be eligible for equity and benefits.

Applications for this job will be accepted at least until October 24, 2026.

This posting is for an existing vacancy.

NVIDIA uses AI tools in its recruiting processes.

NVIDIA is committed to fostering an inclusive work environment and proud to be an equal opportunity employer. As we highly value diversity in our current and future employees, we do not discriminate (including in our hiring and promotion practices) on the basis of race, religion, color, national origin, gender, gender expression, sexual orientation, age, marital status, veteran status, disability status or any other characteristic protected by law.