Senior Verification Engineer

NXP Semiconductors; Austin (TX); On-site; USD 100,000 - 140,000; Full time

Job summary

NXP Semiconductors in Austin is seeking a Senior Verification Engineer to drive a zero-defect mindset and provide technical leadership within a small team. The role focuses on verification plans, development of testbenches, and advanced debugging skills.

The ideal candidate will have a BSEE with 5+ years in the semiconductor industry or an advanced degree with relevant experience. Familiarity with protocols and scripting is crucial for success in this position.

Qualifications

• BSEE with 5+ years of experience in semiconductor industry.
• MSEE with 3+ years of experience.
• PhD with 1+ years of experience.

Responsibilities

• Define and execute verification plans.
• Develop and implement verification testbenches.
• Analyze RTL, functional coverage, and assertion coverage results.

Skills

Verilog

SystemVerilog

DDR

PCIe

AMBA (CHI, ACE, AXI)

Python

Perl

UNIX/Linux

Education

BSEE with 5+ years of semiconductor industry experience

MSEE with 3+ years of experience

PhD with 1+ years of experience

Tools

AI/LLM-based approaches

OVM/UVM

Job description

Job Title

Senior Verification Engineer

Location

Austin

Role Summary

We develop best‑in‑class digital IPs for NXP’s automotive and advanced microcontroller businesses, delivering sensor and processing technologies that enable secure, connected vehicles today and autonomous vehicles of the future.

• Drive a "zero-defect" mindset across the verification team
• Provide technical leadership and guidance on complex verification challenges
• Mentor and grow a small team of engineers

Job Responsibilities

• Define and execute verification plans
• Develop and implement verification testbenches
• Develop testbench components such as drivers, monitors, and scoreboards, and leverage advanced UVM VIPs
• Develop directed and constrained‑random stimulus
• Analyze RTL, functional coverage, and assertion coverage results
• Define and develop functional coverage models
• Develop and maintain SystemVerilog assertions (SVA)
• Apply formal verification methodologies
• Demonstrate strong debugging skills, including failure reproduction and root‑cause analysis
• Exhibit strong analytical and problem‑solving skills; familiarity with major simulation and debug tools is a plus

Job Qualifications

• BSEE with 5+ years of semiconductor industry experience
• MSEE with 3+ years of experience
• PhD with 1+ years of experience

Technical Skills

• Knowledge of protocols such as DDR, PCIe, AMBA (CHI, ACE, AXI)
• Strong expertise in Verilog, SystemVerilog (VHDL is a plus)
• Experience with OVM/UVM and class‑based verification methodologies
• Experience with formal verification methodologies
• Experience leveraging AI/LLM‑based approaches to improve engineering efficiency
• Test pattern debugging and validation on simulation and automated test environments
• Scripting in Python, Perl, and UNIX/Linux
• Familiarity with functional and code coverage methodologies

Equal Opportunity Statement

NXP is an Equal Opportunity/Affirmative Action Employer regardless of age, color, national origin, race, religion, creed, gender, sex, sexual orientation, gender identity and/or expression, marital status, status as a disabled veteran and/or veteran of the Vietnam Era or any other characteristic protected by federal, state or local law. In addition, NXP will provide reasonable accommodations for otherwise qualified disabled individuals.