Senior Validation Architect, NVLink

NVIDIA Corporation

Westford (MA)

On-site

USD 184,000 - 357,000

Full time

14 days+
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Job summary

NVIDIA Corporation is seeking a Senior Validation Architect for NVLink to define architectural modeling and testing requirements, drive tests into lower level testbenches, and implement functional models for full-chip and multi-chip environments. You will support firmware/software development and debugging across model, emulation, and post-silicon stages.

The role requires an MS or PhD in relevant fields and 8+ years of architecture/design/verification experience in ASIC processes, with strong

Qualifications

  • MS or PhD in Electrical Engineering, Computer Science or Computer Engineering (or equivalent experience).
  • 8+ years of experience in architecture, design, and verification.
  • Experience with innovative ASIC design processes.
  • C++ and scripting languages (Python, Makefile); SystemC modeling a plus.
  • Strong FW/SW debugging skills and IP model integration.
  • Testplan development and execution experience.
  • Proven track record shipping multiple projects in processor and/or I/O architecture.

Responsibilities

  • Define architectural modeling and testing requirements for NVLink features.
  • Drive architectural testing into lower level testbenches.
  • Implement functional models and integrate into full-chip and multi-chip environments for architectural validation and firmware/software development.
  • Support and debug tests in model, emulation, and post-silicon environments.

Skills

C++
Python
SystemC
Firmware debugging
Test planning
Architecture verification
ASIC design experience

Education

MS or PhD in Electrical Engineering, Computer Science or Computer Engineering
Equivalent experience

Tools

SystemC

Job description

We are now looking for a Senior Validation Architect for NVLink! NVIDIA is seeking an experienced technical leader passionate about defining advanced chip interconnects and protocols. You’ll be part of a team responsible for defining next generation communications standards and products building on our current NVLink technology. The job scope ranges from developing initial product requirements, working with research, other architects, software/firmware and product development teams to shepherd the design through all phases of the product lifecycle.

What you will be doing:
  • Working with other architects to define architectural modeling and testing requirements for new NVLink features
  • Driving architectural testing requirements into lower level testbenches
  • Implementing functional models and integrating those into fullchip and multichip environments for both architectural validation and firmware/software development
  • Supporting and debugging tests in model, emulation, and post-silicon environments
What we need to see:
  • You have a MS or PhD in Electrical Engineering, Computer Science or Computer Engineering (or equivalent experience)
  • At least 8+ years of relevant experience in some combination of architecture, design, and verification
  • Firsthand work experience with innovative ASIC design processes
  • C++ and scripting language (Python, Makefile) experience; SystemC modeling a plus
  • Strong debugging skills in FW/SW environments and IP model integration
  • Testplan development and execution experience
  • You've completed and shipped multiple projects and are skilled at processor and/or I/O Architecture.

Your base salary will be determined based on your location, experience, and the pay of employees in similar positions. The base salary range is 184,000 USD - 287,500 USD for Level 4, and 224,000 USD - 356,500 USD for Level 5.

You will also be eligible for equity and benefits.

Applications for this job will be accepted at least until January 13, 2026.

NVIDIA uses AI tools in its recruiting processes.

NVIDIA is committed to fostering a diverse work environment and proud to be an equal opportunity employer. As we highly value diversity in our current and future employees, we do not discriminate (including in our hiring and promotion practices) on the basis of race, religion, color, national origin, gender, gender expression, sexual orientation, age, marital status, veteran status, disability status or any other characteristic protected by law.

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