Senior Architect, NVLink

NVIDIA; Westford (MA); On-site; USD 184,000 - 357,000; Full time

Benefits offered by this job

Equity

Benefits

Job summary

NVIDIA in the United States is seeking a Senior Architect (NVLink) to shape next-gen interconnects. You will lead architecture development for chip-to-chip communications, collaborating with research, architects, and product teams to shepherd requirements through the product life cycle.

The role requires 8+ years in architecture/design/verification, MS or PhD, and hands-on ASIC experience. Proficiency in C++ and Verilog, with a self-starter mindset in a small dynamic team.

Qualifications

• MS or PhD in Electrical Engineering, Computer Science or Computer Engineering (or equivalent).
• 8+ years of architecture/design/verification experience.
• Experience with innovative ASIC design processes and shipped projects.
• Proficient in C++ and Verilog; able to work across teams.

Responsibilities

• Research architecture solutions for chip-to-chip communication optimizing perf, area, power, and resiliency.
• Define interfaces and data flows between NVLink blocks and the rest of the chip.
• Architectural modeling, validation, definition and documentation.
• Drive implementation across design, verification, firmware and software teams.
• Collaborate with switch teams to define NVLink fabric architecture.
• Define network configuration and management flows.

Skills

C++

Verilog

Architecture

ASIC design

Leadership

Education

MS/PhD in EE/CS

Job description

We are now looking for a Senior Architect (NVLink)! NVIDIA is seeking an experienced technical leader passionate about defining advanced chip interconnects and protocols. You’ll be part of a team responsible for defining next generation communications standards and products building on our current NVLink technology. The job scope ranges from developing initial product requirements, working with research, other architects, software/firmware and product development teams to shepherd the design through all phases of the product lifecycle.

What You Will Be Doing

• Researching and crafting architecture solutions for chip-to-chip communication, optimizing for performance, area, power, security, and resiliency
• Working with other design teams to define interfaces and flows between NVLink blocks and the rest of the chip
• Architectural modeling, validation, definition and documentation
• Driving implementation across design, verification, firmware and software teams
• Working with switch teams to define NVLink fabric architecture
• Defining network configuration and management flows

What We Need To See

• You have a MS or PhD in Electrical Engineering, Computer Science or Computer Engineering (or equivalent experience)
• At least 8+ Years of relevant experience in some combination of architecture, design, and verification
• Firsthand work experience with innovative ASIC design processes
• You’ve completed and shipped multiple projects and are skilled at processor and I/O Architecture.
• Programming abilities in C++, Verilog
• A self-starter excited to work as part of a small dynamic team

NVIDIA is widely considered to be one of the technology world’s most desirable employers. We have some of the most forward-thinking and hardworking people in the world working for us. If you're creative, autonomous and love a challenge, we want to hear from you!

Your base salary will be determined based on your location, experience, and the pay of employees in similar positions. The base salary range is 184,000 USD - 287,500 USD for Level 4, and 224,000 USD - 356,500 USD for Level 5.

You will also be eligible for equity and benefits.

Applications for this job will be accepted at least until August 7, 2026.

This posting is for an existing vacancy.

NVIDIA uses AI tools in its recruiting processes.

NVIDIA is committed to fostering an inclusive work environment and proud to be an equal opportunity employer. As we highly value diversity in our current and future employees, we do not discriminate (including in our hiring and promotion practices) on the basis of race, religion, color, national origin, gender, gender expression, sexual orientation, age, marital status, veteran status, disability status or any other characteristic protected by law.