Senior TPU Co-Design & Performance Engineer - LLM Serving

Google; United States; On-site; USD 174,000 - 252,000; Full time

Benefits offered by this job

Health insurance

Job summary

Google Cloud's TPU Chip Architecture and Performance Co-design team is at the forefront of optimizing Google's custom AI silicon for next-generation machine learning models. As a Senior Performance Co-Design Engineer, you’ll focus on LLM serving studies and work with hardware architects to influence accelerator evolution.

You will conduct comprehensive performance analyses, develop simulation and profiling tools, and drive data-backed roadmap decisions for TPU/Cloud Silicon architectures,

Qualifications

• Bachelor's degree in CS/EE/CE or equivalent.
• 5 years of experience in performance modeling/engineering, computer architecture, co-design, or systems engineering.
• Experience programming in C++ or Python.

Responsibilities

• Study serving performance of current and emerging LLMs (1P/3P models).
• Develop simulation, profiling, and modeling tools to identify bottlenecks and project serving workload performance.
• Partner with model researchers, software and hardware teams to co-design architectural improvements for LLM inference latency and throughput.
• Drive data-backed decisions that influence the roadmap for future TPU/Cloud Silicon architectures.

Job description

Google Cloud's TPU Chip Architecture and Performance Co-design team is at the forefront of optimizing Google's custom AI silicon for next-generation machine learning models. As a Senior Performance Co-Design Engineer, you’ll focus on LLM serving studies and work with hardware architects to influence accelerator evolution.

You will conduct comprehensive performance analyses, develop simulation and profiling tools, and drive data-backed roadmap decisions for TPU/Cloud Silicon architectures,