Senior Technical Lead - FEA, ANSYS, Abaqus

HCL Technologies Limited; United States; On-site; USD 140,000 - 190,000; Full time

Job summary

Meta is seeking a Senior Technical Lead for FEA, focusing on structural analysis, warpage, and vibration in electronics packaging. You will drive analysis plans, model development, and result interpretation to meet acceptance criteria.

The role requires deep experience with PCB/PCBA warpage, shock and vibration, and close collaboration with test teams to close gaps between simulations and measurements.

Qualifications

• 5+ years of structural FEA experience in electronics/PCBA/semiconductor packaging.
• Proficiency with Ansys and/or Altair/HyperMesh.
• Experience with PCB warpage simulation and temperature effects.
• Strong test correlation and reporting against acceptance criteria.

Responsibilities

• Perform static structural FEA for stiffener design iterations.
• Conduct shock and vibration analyses and verify modal separation.
• Run staged warpage simulations from bare PCB to fully populated PCBA.
• Deliver analysis plans, meshed models, and pass/fail reports against criteria.

Skills

Structural FEA

ANSYS / HyperMesh

PCB warpage simulation

Vibration & Shock analysis

Test correlation

Load case execution

Tools

Ansys

Altair HyperMesh

APDL scripting

Job description

Career Opportunities: Senior Technical Lead - FEA, ANSYS, Abaqus (171937)

Requisition ID171937-Posted09/28/2026

Role. Run structural, shock/vibration, and warpage simulations for the module; report against Meta acceptance criteria and correlate to test data.

Key Responsibilities

Responsibilities

• Static structural FEA — stiffener design iterations (rib layout, thickness, geometry, mounting locations, material) under mounting-pressure, gravity-sag and handling loads
• Shock and vibration (S&V) — random vibration, sine sweep and shock per transport and operational spec; verify modal separation and no fatigue or yield failure
• Staged warpage simulation — bare PCB, populated components and full PCBA, at room and high temperature; flag SMT risk against package warpage contours
• Deliverables — analysis plans, meshed models, result fields and warpage contours, each with a pass/fail report against Meta acceptance criteria

Skill Requirements

Must-have

• 5+ years structural FEA in electronics, PCBA, or semiconductor packaging
• Ansys and/or Altair / HyperMesh (final toolchain TBC)
• PCB / PCBA warpage simulation — CTE mismatch, reflow- and assembly-induced, room and high temperature
• Shock / vibration and drop analysis; modal and fatigue assessment
• Demonstrated test correlation — model versus measured, and closing the gap
• Able to execute defined load cases and report crisply against acceptance criteria

Nice-to-have

• Modeling board-to-board / supplier-to-supplier laminate variation — nominal models assume identical laminate data across suppliers, while real warpage varies significantly supplier to supplier; capturing that spread is a core capability
• Liquid-cooled module structures; cold-plate preload effects
• Advanced or composite stiffener materials
• Scripting for parametric sweeps (Python / APDL)

Other Requirements

Nice-to-have

• Modeling board-to-board / supplier-to-supplier laminate variation — nominal models assume identical laminate data across suppliers, while real warpage varies significantly supplier to supplier; capturing that spread is a core capability
• Liquid-cooled module structures; cold-plate preload effects
• Advanced or composite stiffener materials
• Scripting for parametric sweeps (Python / APDL)