Senior Teamcenter PLM Architect — Semiconductor

QUALCOMM, Inc.; San Diego (CA); On-site; USD 148,000 - 222,000; Full time

Job summary

Qualcomm Incorporated is seeking a Solution Architect – Teamcenter PLM (Semiconductor) to design and govern business-capability-driven PLM solutions using Siemens Teamcenter as the enterprise backbone for semiconductor product lifecycle management.

The role focuses on mapping capabilities, governing data models, and defining a future-state digital thread roadmap. It requires 10–15+ years in IT/enterprise design and 6–10+ years in Teamcenter architecture, with on-site work in San Diego, CA.

Qualifications

• Bachelor’s degree in Engineering, Computer Science, Information Systems, or equivalent.
• Master’s degree in Engineering, Computer Science, Systems Engineering, or Engineering Management (preferred).
• 10–15+ years of IT, engineering systems, or enterprise solution design experience.
• 6–10+ years of Siemens Teamcenter experience in architect or lead roles.
• Strong ability to map business processes to Teamcenter designs.

Responsibilities

• Lead solution architecture by translating business capabilities into Teamcenter functional designs, including product definition, change and release governance, lifecycle and revision management, and manufacturing readiness.
• Partner with business stakeholders to ensure PLM solutions reflect semiconductor operations and governance patterns across the lifecycle.
• Define and govern architecture for Teamcenter product capability Mastery, data models, metadata, and access control.

Education

Bachelor's degree in Engineering, Computer Science, Information Systems, or equivalent

Master’s degree in Engineering, Computer Science, Systems Engineering, or Engineering Management

Job description

Qualcomm Incorporated is seeking a Solution Architect – Teamcenter PLM (Semiconductor) to design and govern business-capability-driven PLM solutions using Siemens Teamcenter as the enterprise backbone for semiconductor product lifecycle management.

The role focuses on mapping capabilities, governing data models, and defining a future-state digital thread roadmap. It requires 10–15+ years in IT/enterprise design and 6–10+ years in Teamcenter architecture, with on-site work in San Diego, CA.