Senior Systems Solutions Architect: Edge AI SoCs

Cadence

San Jose (CA)

On-site

USD 186,000 - 345,000

Full time

2 hours ago
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Job summary

Cadence is seeking a Systems Solutions Architect and Technical Lead to define compute-centric SoCs for AI applications. You will shape the hardware/software stack, define boot/run-time data flows, security, and safety, and drive subsystems from concept to production.

Lead architecture with Cadence SSG IP including Tensilica DSPs, CPUs, Neo NPU, and accelerators. Travel up to 10% is expected.

Qualifications

  • 12+ years in a leading architectural or system engineering role, with production experience.
  • Proven ability to architect integrated hardware and software solutions.
  • Experience enabling performance modeling with SystemC or similar tools.
  • Background in Physical AI (robotics/autonomous systems) with real-time data handling.
  • Strong written and verbal communication skills.
  • Willingness to travel up to 10%, including international travel.

Responsibilities

  • Define and own the system architecture for new hardware subsystems and software stacks.
  • Architect solutions using Cadence SSG IP, including DSPs, CPUs, and accelerators.
  • Collaborate with performance modeling teams to build cycle-accurate simulations.
  • Handoff architectural specs to RTL/Hardware and Software/Firmware teams for alignment.
  • Validate that software stack yields maximum performance on hardware features.
  • Build PoC and reference designs demonstrating Cadence IP capabilities.
  • Liaise with Cadence partners to influence future IP roadmaps.

Skills

System architecture
Performance modeling
SystemC/TLM
Physical AI
Communication
Travel readiness

Tools

SystemC
TLM

Job description

Cadence is seeking a Systems Solutions Architect and Technical Lead to define compute-centric SoCs for AI applications. You will shape the hardware/software stack, define boot/run-time data flows, security, and safety, and drive subsystems from concept to production.

Lead architecture with Cadence SSG IP including Tensilica DSPs, CPUs, Neo NPU, and accelerators. Travel up to 10% is expected.

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