Senior Staff Digital Verification Engineer — Control Loops

SmartRecruiters, Inc.; Austin (TX); On-site; USD 140,000 - 190,000; Full time

Job summary

Renesas Electronics seeks an experienced Senior Staff Digital Engineer to lead verification and evidence development for control-loop features in advanced digital power management products. You will translate feature intent into test plans, define pass/fail criteria, and correlate results across models, RTL, emulation, bench tests, and silicon.

The role requires hands-on control-loop expertise, verification automation, and the ability to resolve discrepancies between expected behavior and

Qualifications

• Bachelor’s degree in Electrical Engineering, Computer Engineering, or related technical discipline.
• 8+ years of relevant experience in digital power control, mixed-signal verification, semiconductor validation, systems engineering, power electronics, design verification, or related product development.
• Strong understanding of feedback control systems including compensation, stability, bandwidth, transient response, latency, sampling, quantization, saturation, and nonlinear behavior.
• Experience verifying or validating control-loop features using measurable engineering evidence.
• Strong understanding of mixed-signal building blocks such as ADCs, DACs, sensing paths, amplifiers, references, timing circuits, PWM paths, and power stages.
• Experience developing test plans, test scenarios, pass/fail criteria, metrics, and technical evidence for complex electronic systems.
• Ability to analyze waveforms and data, isolate behavioral differences, and connect observed results to feature intent and implementation.
• Ability to independently lead technically complex verification activities from requirements through final correlation and documentation.
• Strong communication skills and the ability to explain complex loop behavior and verification results clearly.

Responsibilities

• Lead verification and evidence development for digital control-loop features and functions.
• Translate feature requirements and system intent into measurable verification plans, test scenarios, and pass/fail criteria.
• Verify control-loop behavior across operating conditions, configurations, limits, sequencing, and corner cases.
• Develop tests covering compensation, stability, bandwidth, transient response, latency, sampling, quantization, saturation, limits, mode transitions, sensing behavior, telemetry, and feature interactions.
• Correlate feature behavior across models, RTL, analog/mixed-signal simulation, emulation, bench validation, and silicon measurements where applicable.
• Evaluate interactions between digital loop functions and analog components, including sensing paths, ADCs, DACs, references, PWM generation, timing paths, and power stages.
• Produce clear verification evidence with test conditions, configurations, metrics, plots, waveforms, results, conclusions, and risks.
• Develop reusable automation for parameter sweeps, corner testing, waveform analysis, regression testing, and evidence generation.
• Investigate discrepancies between expected feature behavior and results from simulation, emulation, bench testing, or silicon.
• Collaborate with systems, analog/digital design, firmware, design verification, validation, applications, and software/tool teams.
• Identify missing requirements, test coverage, observability, or infrastructure to verify loop features effectively.
• Document test intent, assumptions, configurations, results, limitations, and residual risks for technical and leadership audiences.
• Provide technical guidance and mentorship to engineers working on control-loop verification and validation.

Skills

Digital power control

Verification

Control loops

Mixed-signal verification

Test planning

Education

Bachelor's degree in Electrical Engineering

Tools

Verilog-AMS

SystemVerilog RNM

MATLAB

Python

Job description

Renesas Electronics seeks an experienced Senior Staff Digital Engineer to lead verification and evidence development for control-loop features in advanced digital power management products. You will translate feature intent into test plans, define pass/fail criteria, and correlate results across models, RTL, emulation, bench tests, and silicon.

The role requires hands-on control-loop expertise, verification automation, and the ability to resolve discrepancies between expected behavior and