Senior Staff Digital/RTL Design Engineer (Remote)

Acara Solutions, An Aleron Company; United States; On-site; USD 120,000 - 190,000; Full time

Job summary

Acara Solutions, An Aleron Company, is seeking a Sr. Staff/Staff Digital Design Engineer to develop novel SoC products for connectivity and communication.

You will define products, specify performance, and deliver high-quality digital solutions including Verilog stimulus files and test benches for bring up and characterization. You will work with cross-functional teams to ensure on-time delivery, contribute to architecture development, and implement design methodologies and flows for secure,

Qualifications

• Bachelor degree in Electrical Engineering required.
• RTL design experience for SoC/ASIC (8+ years) required.
• UPF experience (4+ years) required.
• Knowledge of SoC architectures with embedded processors desirable.

Responsibilities

• Contribute to SoC architecture development for high-performance IoT devices.
• Use SystemVerilog, Python, Tcl, UPF to bring designs from concept to silicon and production.
• Collaborate cross-functionally with Systems/RF/software/firmware/verification/validation/operations teams.
• Support schedule and resource planning to deliver products to market on time.
• Help define digital/system design methodologies and test strategies.

Skills

RTL design

SystemVerilog

Python

Tcl

Education

Bachelor in Electrical Engineering

Tools

Verilog/SystemVerilog

UPF

Job description

As a Sr. Staff/Staff Digital Design Engineer, you will be working with a team of design engineers to develop novel SoC products for connectivity and communication. You will also be a key contributor to product definition and resulting detailed device performance and functional requirements specifications. In addition to delivering high quality digital solutions, the team supports other disciplines with work product such as Verilog stimulus files, test benches for device bring up/characterization, test vectors for product manufacturing.

Key Responsibilities

• Contribute to SoC architecture development for high-performance low-power IoT devices
• Employ skills in SystemVerilog, Python, Tcl, UPF to bring designs from concept through architecture to silicon and, finally, high-volume production
• Work cross-functionally with Systems/RF/software/firmware/verification/validation/operations teams
• Support schedule and resource planning to deliver products to market on time
• Help to define digital/system design and implementation methodologies and test strategies and flows

Job Requirements

• Bachelor Degree in Electrical Engineering
• Minimum 8 years of RTL design experience for SoC/ASIC
• Minimum 4 years of UPF experience
• Theoretical and practical knowledge of SoC architectures employing embedded processors
• Familiarity with common bus architectures like AXI/AHB/APB/OBI
• Deep RTL design knowledge (SystemVerilog)
• Experience with multi-clock and multi-power domain systems and strategies to control and minimize power consumption
• Understanding of timing constraints, static timing analysis and timing closure
• Experience with Arm TrustZone, device lifecycle states, Secure Boot, and PSA Certified Level 2+ security.