Senior Staff Design Verification Engineer

Davita Inc.; Austin (TX); On-site; USD 110,000 - 160,000; Full time

Job summary

A leading company in healthcare services seeks a Design Verification Engineer to oversee digital and mixed-signal design verification for IoT applications. This role requires deep expertise in developing comprehensive verification test plans and assuring quality results. The ideal candidate holds a Bachelor's degree in Electrical Engineering and possesses at least 8 years of experience in SoC verification processes. Responsibilities include writing test benches using SystemVerilog and managing overall verification quality to align with industry standards.

Qualifications

• Minimum 8 years design verification experience in SoC development environment.
• Experience with C-based and SystemVerilog/UVM verification.

Responsibilities

• Develop test plans at block, sub-system, and chip level.
• Automate the test environment for randomized testing and scoreboarding.
• Ensure verification quality meets or exceeds industry standards.

Skills

C-based lib packages

SystemVerilog

UVM

Root-cause analysis

Advanced debugging techniques

Education

Bachelor Degree in Electrical Engineering

Job description

Description

Responsible for verifying digital and mixed-signal designs, including systems-on-chip with multiple CPUs, digital signal processors, security hardware, and other logic for IoT applications. Assumes full ownership of DV tasks and delivers high-quality results.

-Develop test plans at block, sub-system, and chip level. Execute SoC-based verification at full chip.

-Write C-based lib packages and tests. Architect and implement scalable and reusable test benches using SystemVerilog and UVM.

-Develop comprehensive test cases, stimulus generation, and checkers to achieve high coverage.

-Automating the test environment for randomized testing and scoreboarding. Utilize advanced debugging techniques to identify and resolve design and verification issues.

-Perform root-cause analysis and work with design teams to fix identified issues. Define and track functional and code coverage metrics to ensure thorough verification.

-Ensure that verification quality meets or exceeds industry standards and project requirements.

Job Requirements

Required Skills / Qualifications:

Bachelor Degree in Electrical Engineering

Minimum 8 years design verification experience in SoC development environment to include C-based and SystemVerilog/UVM verification

Preferred Skills / Qualifications:

Aleron companies (Acara Solutions, Aleron Shared Resources, Broadleaf Results, Lume Strategies, TalentRise, Viaduct) are an Equal Opportunity Employer. Race/Color/Gender/Religion/National Origin/Disability/Veteran.

Applicants for this position must be legally authorized to work in the United States. This position does not meet the employment requirements for individuals with F-1 OPT STEM work authorization status.

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