Senior Staff CPU Design Verification Lead

Google; Portland (OR); On-site; USD 240,000 - 333,000; Full time

Job summary

Google LLC is seeking a Senior Staff CPU Design Verification Lead to drive verification architectures and methodologies for complex ASIC/SoC designs. Lead test planning, testbench development, and coverage closure while architecting advanced environments using SystemVerilog and UVM to maximize test coverage.

Ideal candidates will have 15+ years in verification, experience leading teams for ARM/X86-ISA based processors, and strong knowledge of mobile processor micro-architecture and related

Qualifications

• Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or related field.
• 15 years of experience with verification methodologies and languages, such as UVM and SystemVerilog.
• Experience leading a functional verification team for ARM or X86 compliant processor-based products.
• Experience with functional verification and performance validation of modern mobile processors, micro-architecture, and related technologies.

Responsibilities

• Lead the definition of verification architectures and methodologies for complex ASIC and SoC designs.
• Drive the overall verification strategy, including test planning, testbench development, and coverage closure metrics.
• Architect advanced verification environments using SystemVerilog and UVM to ensure maximum test coverage.
• Define formal verification strategies to mathematically prove design correctness for critical hardware blocks.
• Establish emulation and post-silicon validation plans to accelerate system-level integration and debugging.

Skills

Verification leadership

Functional verification

Performance validation

Testbench development

Education

Bachelor's degree in Electrical/Computer Engineering or Computer Science

Master's or PhD preferred

Tools

UVM

SystemVerilog

Job description

Share Senior Staff CPU Design Verification Lead

Google Austin, TX, USA ; Mountain View, CA, USA ; +1 more

In most instances, this position requires in‑person interviews as part of the hiring process. Note: By applying to this position you will have an opportunity to share your preferred working location from the following: Austin, TX, USA; Mountain View, CA, USA; Poughkeepsie, NY, USA.

• Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience.


• 15 years of experience with verification methodologies and languages, such as UVM and SystemVerilog.


• Experience leading a functional verification team for ARM or X86 compliant processor‑based products.


• Experience with functional verification and performance validation of modern mobile processors, micro‑architecture, and related technologies.

Preferred qualifications:

• Master's degree or PhD in Electrical Engineering, Computer Engineering or Computer Science, with an emphasis on computer architecture.


• 15 years of experience in industry design verification.


• Experience in ISAs, X86, and RISC‑V.


• Knowledge of general purpose operating systems such as Linux and Android.


• Knowledge of ARM Instruction Set Architecture (ISAs).

About the job

Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of Google's direct‑to‑consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.Google's mission is to organize the world's information and make it universally accessible and useful. Our team combines the best of Google AI, Software, and Hardware to create radically helpful experiences. We research, design, and develop new technologies and hardware to make computing faster, seamless, and more powerful. We aim to make people's lives better through technology.Individual pay is determined by factors including job‑related skills, experience, and relevant education or training.

US: $240000 - $333000 (USD) + 25% bonus target + equity + benefits

Learn more about benefits at Google .

• Lead the definition of verification architectures and methodologies for complex ASIC and SoC designs.


• Drive the overall verification strategy, including test planning, testbench development, and coverage closure metrics.


• Architect advanced verification environments using SystemVerilog and UVM to ensure maximum test coverage.


• Define formal verification strategies to mathematically prove design correctness for critical hardware blocks.


• Establish emulation and post‑silicon validation plans to accelerate system‑level integration and debugging.

Google is proud to be an equal opportunity and affirmative action employer. We are committed to building a workforce that is representative of the users we serve, creating a culture of belonging, and providing an equal employment opportunity regardless of race, creed, color, religion, gender, sexual orientation, gender identity/expression, national origin, disability, age, genetic information, veteran status, marital status, pregnancy or related condition (including breastfeeding), expecting or parents‑to‑be, criminal histories consistent with legal requirements, or any other basis protected by law. See also Google's EEO Policy , Know your rights: workplace discrimination is illegal , Belonging at Google , and How we hire .

Google is a global company and, in order to facilitate efficient collaboration and communication globally, English proficiency is a requirement for all roles unless stated otherwise in the job posting.

Equity is granted exclusively and discretionarily by Alphabet Inc. on the basis of an agreement concluded between you and Alphabet Inc. Alphabet Inc. is your sole contractual partner with respect to equity grants. GSU grants are not guaranteed, are discretionary, are subject to approval by the Alphabet Inc. board of directors or its delegate, the terms of the relevant Alphabet Inc. stock plan, and your grant agreement. They have no impact on statutory payments. Current or past grants do not confer an acquired right.