Senior Staff Circuit Design Engineer

Quintessent Inc.

California (MO)

On-site

USD 120,000 - 180,000

Full time

14 days+

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Job summary

Quintessent Inc. is advancing AI infrastructure with a laser platform for scalable data centers. We seek a senior circuit design engineer to own high-speed electronics for pluggable optical interconnects, from spec to silicon bring-up, with firmware influence on product direction.

You will design analog and mixed-signal blocks (SerDes, PLL, ADC/DAC) and DWDM interconnects, collaborate with layout, RTL, and firmware teams, and drive Cadence simulations and ATE tests to ensure production readiness.

Qualifications

  • B.S. or M.S. in Electrical engineering.
  • Strong analog design expertise.
  • Experience with high-speed SerDes, PLL, ADC, DAC design.
  • Experience in optical Driver, TIA design is an asset.
  • Ability to go from spec to block diagram, schematic capture, layout reviews, and Monte Carlo simulations.
  • Hands-on use of Cadence tools to generate, simulate, and assemble unit blocks and top-level blocks.
  • Collaborate with layout, RTL, and firmware engineers.
  • Knowledge of DFT tool flow for high-speed circuits and associated ATE and systems testing is an asset.

Responsibilities

  • Develop firmware guidance for products as the technical authority.
  • Build or select electronics for optical interconnect products (compensation circuits, driver, TIAs).
  • Develop circuits for next-generation DWDM-based interconnects.
  • Collaborate with layout, RTL, and firmware teams to bring blocks to production.

Skills

Analog design
High-speed SerDes
PLL design
ADC/DAC design
Schematic capture
Block diagram development
DFT tool flow
Monte Carlo simulations
Firmware integration

Education

B.S. or M.S. in Electrical engineering

Tools

Cadence tools
Layout review processes
Simulations

Job description

Build the laser platform that powers the next generation of AI infrastructure.

Quintessent is taking on some of the hardest challenges in optical connectivity – directly

attacking the foundational bottlenecks limiting the scalability and reliability of next-generation AI

and computing infrastructure. Our team has trailblazed pioneering work in quantum dot lasers

and amplifiers, heterogeneous integration, and multi-wavelength silicon photonics. We are

converging innovations in materials science, process integration, chip and system design to

build products that we believe will form a core part of AI networking systems.

We are a scrappy, high-trust team that takes ownership, stays humble, and believes in tackling

hard problems with speed, intellectual honesty, and relentless improvement. We hold ourselves

to a high bar, start from a deep understanding of our customers’ problems, and win or lose

together. If this sounds like you, and you want to build the laser and electronics platform that powers the next generation of AI infrastructure, we’d love to talk.

We are looking for a senior circuit design engineer to build the next generation of pluggable optical interconnects for Scale-Up and Scale-Out Data Center Interconnect Products

You will be the technical authority developing firmware for products, responsible for:

Building and/or selecting electronics for optical interconnected products.These include compensation circuits for silicon photonics, and driver and TIAs.Developing circuits for next generation DWDM based WPO (Wide and Parallel Optical Interconnects).

Your work will directly shape the products that ship and the capabilities the company builds.

To succeed, you will need these qualifications:

  • B.S. or M.S. in Electrical engineering.
  • Must have strong analog design expertise.
  • Experience with high-speed SerDes, PLL, ADC, DAC design.
  • Experience in optical Driver, TIA design is an asset.
  • Ability to work from specification to block diagram. schematic capture, layout reviews, and associated monte-carlo simulations.
  • Hands on experience in using Cadence tools to generate, simulate, and assemble unit level blocks, and assembling top level blocks in hierarchical tools flows.Work closely with layout engineer, RTL engineer, and firmware engineers.
  • Knowledge of DFT tool flow for high-speed circuits and associated ATE, and systems testing is an asset. Ability to bring up the blocks in time and put a plan for silicon bring up for production devices

Bonus if you’ve also:

  • Worked directly with customers or partners
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