Senior SoC Verification Engineer — Hybrid, Lead & Innovate

Arm Limited; Raleigh (NC); Hybrid; USD 162,000 - 219,000; Full time

Job summary

Arm Limited in Raleigh is seeking a creative verification engineer to join a team focused on SoC integration and performance verification across PCIe/CXL, DDRx/LPDDRx, and HBM. You will design test plans, develop SystemVerilog/Verilog testbenches, debug failures, and help advance verification methodologies while collaborating with RTL design teams.

Applicants should have 5+ years in compute subsystems or SoCs and a CS/EE degree.

Qualifications

• Solid understanding of digital hardware design and Verilog HDL.
• Experience with verification strategies for sophisticated SoC development, including software-based techniques.
• Experience verifying subsystems for PCIe/CXL, DDRx/LPDDRx, HBM.
• Good knowledge of test plan creation and tracking.
• Experience verifying RTL for SoC projects.
• Low-level programming experience including C and Assembler.

Responsibilities

• Craft test plans for SoC verification.
• Develop SystemVerilog/Verilog testbenches and tests.
• Debug test failures and issues.
• Contribute to verification methodologies used by the team.
• Work closely with design teams on microarchitecture and system performance.
• Guide and support junior team members and balance PM-related activities.

Skills

Digital hardware design

Verilog HDL

SoC verification strategies

PCIe/CXL / DDRx/LPDDRx / HBM

Test plan creation and tracking

RTL verification for SoC projects

C and Assembler programming

Education

Bachelor's or Master's degree in Computer Science or Electrical/Computer Engineering

Tools

SystemVerilog

Verilog

UVM/OVM

Perl/Python scripting

Job description

Arm Limited in Raleigh is seeking a creative verification engineer to join a team focused on SoC integration and performance verification across PCIe/CXL, DDRx/LPDDRx, and HBM. You will design test plans, develop SystemVerilog/Verilog testbenches, debug failures, and help advance verification methodologies while collaborating with RTL design teams.

Applicants should have 5+ years in compute subsystems or SoCs and a CS/EE degree.