Senior SoC Systems Software Engineer — HW/SW Co-Design

Amazon Inc.; San Diego (CA); On-site; USD 168,000 - 227,000; Full time

Benefits offered by this job

Health insurance

RSUs

401(k) matching

Paid time off

Parental leave

Job summary

Annapurna Labs, the AWS unit, seeks a Systems Software Engineer to work at the hardware-software boundary on SoC models and infrastructure. You will debug across register-level bring-up, emulators, and live silicon, collaborating with chip architects, RTL designers, modelers, compiler engineers, and ML framework teams to co-design interfaces.

You should be comfortable reading hardware specs, writing low-level software in C++ near the hardware, and using Python for tooling.

Qualifications

• 6+ years of full software development lifecycle, including coding standards, code reviews, source control, build processes, testing, and operations experience.
• 7+ years of professional experience developing firmware, drivers, runtime software, or low-level systems software for SoCs/ASICs/GPUs/CPUs/FPGAs.
• Experience programming in C++, Python, and/or Rust (prefer 2+).
• Knowledge of SoC/CPU/GPU/ASIC architecture and micro-architecture.

Responsibilities

• Develop and own components of SoC models, single-chip and datacenter-scale.
• Debug hardware/software interactions across the full stack, from register-level bring-up to performance analysis on live silicon.
• Collaborate with chip architects, RTL designers, modelers, compiler engineers, and ML framework teams to co-design interfaces.
• Contribute to hardware feature design by providing a software perspective early in the chip cycle.
• Build tooling, test infrastructure, and automation to accelerate development for the team.

Skills

C++

Python

Rust

Mentoring

Multi-threaded programming

Tools

QEMU

FPGA tooling

Linux kernel development

Job description

Annapurna Labs, the AWS unit, seeks a Systems Software Engineer to work at the hardware-software boundary on SoC models and infrastructure. You will debug across register-level bring-up, emulators, and live silicon, collaborating with chip architects, RTL designers, modelers, compiler engineers, and ML framework teams to co-design interfaces.

You should be comfortable reading hardware specs, writing low-level software in C++ near the hardware, and using Python for tooling.