Senior SoC HAL Architect — Hardware-Software Co-Design

Amazon Inc.

Cupertino (CA)

On-site

USD 193,000 - 262,000

Full time

7 days ago
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Benefits offered by this job

Health insurance
RSUs
Sign-on bonus
401(k) matching
Paid time off
Parental leave

Job summary

Annapurna Labs, part of Amazon, is seeking a Senior Software Development Engineer III to own the HAL/driver architecture for new chips. You will define interfaces, collaborate with RTL designers, and drive pre-silicon and hardware-in-the-loop workflows.

Based in Cupertino, CA or Austin, TX, you will mentor engineers, lead design reviews, and set standards for testing and deployment across the stack. This is a hands-on role at the intersection of hardware and software on cutting-edge silicon.

Qualifications

  • 5+ years of programming in at least one language.
  • 5+ years leading design or architecture of large systems.
  • 5+ years of full SDLC experience including reviews and source control.
  • Experience mentoring or leading an engineering team.
  • Experience with modern C++ and OO design.

Responsibilities

  • Own HAL/driver software architecture for new chips.
  • Partner with RTL designers to shape debuggability and manageability.
  • Deliver HAL blocks across stack and support legacy chips.
  • Set testing and deployment standards for software stack.
  • Make cross-team hardware/software tradeoffs.
  • Mentor engineers, lead design reviews, and drive best practices.

Skills

Programming experience
System architecture leadership
SDLC experience
Mentor / tech lead
Modern C++

Education

Bachelor's degree

Job description

Annapurna Labs, part of Amazon, is seeking a Senior Software Development Engineer III to own the HAL/driver architecture for new chips. You will define interfaces, collaborate with RTL designers, and drive pre-silicon and hardware-in-the-loop workflows.

Based in Cupertino, CA or Austin, TX, you will mentor engineers, lead design reviews, and set standards for testing and deployment across the stack. This is a hands-on role at the intersection of hardware and software on cutting-edge silicon.

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