Senior SoC Power Optimization Engineer (AI Accelerator)

MatX Inc.

Mountain View (CA)

Hybrid

USD 175,000 - 600,000

Full time

14 days+

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Benefits offered by this job

PTO 4 weeks
Company Holidays
Remote work weeks
Health insurance
Dental & Vision
Life insurance
Retirement plan
Professional development
Team meals
Commute reimbursement
AI resources
Parental leave

Job summary

MatX Inc. in Mountain View is seeking silicon power architects to design high-performance AI accelerator SoCs. You will develop power estimation methodologies, build energy models, and perform RTL, gate-level, and post-layout power analysis across major subsystems.

The role requires 8+ years in SoC or AI accelerator design, strong scripting skills in Python or Perl, and experience with low-power techniques. You will collaborate across teams in a fast-paced environment.

Qualifications

  • 8+ years in SoC, AI accelerator, or high-performance digital design.
  • Experience with RTL and gate-level power analysis.
  • Strong scripting in Python or Perl.

Responsibilities

  • Develop and maintain power estimation methodologies for AI accelerator SoCs.
  • Build and calibrate energy models for architectural exploration and power targets.
  • Perform RTL, gate-level, and post-layout power analysis across major SoC subsystems.
  • Analyze AI workloads to identify opportunities for power reduction.
  • Drive power optimization across compute, memory, interconnect, PCIe, and related subsystems.
  • Collaborate with architects and RTL designers on power-efficient microarchitecture.
  • Work with physical design teams on power trade-offs and sign-off scenarios.
  • Develop automation, dashboards, and heuristics to accelerate power analysis.
  • Present results and recommendations to cross-functional teams.

Skills

Power analysis
RTL analysis
Python scripting
Verilog/SystemVerilog
Cross-functional collaboration
Analytics & debugging
ASIC low-power design
8+ years experience

Education

BS or MS in Electrical or Computer Engineering

Tools

Verilog/SystemVerilog

Job description

MatX Inc. in Mountain View is seeking silicon power architects to design high-performance AI accelerator SoCs. You will develop power estimation methodologies, build energy models, and perform RTL, gate-level, and post-layout power analysis across major subsystems.

The role requires 8+ years in SoC or AI accelerator design, strong scripting skills in Python or Perl, and experience with low-power techniques. You will collaborate across teams in a fast-paced environment.

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