Senior SoC Architect: Lead Next‑Gen Heterogeneous Compute

Advanced Micro Devices, Inc.

San Jose (CA)

On-site

USD 180,000 - 240,000

Full time

12 days ago

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Benefits offered by this job

AMD benefits at a glance

Job summary

AMD is seeking a senior SoC Architect to lead architecture definition for next-generation heterogeneous SoCs spanning AI, Data Center, Security, and Embedded Computing. You will shape system-level design, drive performance and power tradeoffs, and guide RTL, verification, physical design, firmware, software, and customer engineering.

Ideal candidates hold MS/PhD in EE/CE with deep expertise in processor subsystems (x86/ARM/RISC‑V), PCIe, UCIe, memory hierarchies, and interconnects, delivering

Qualifications

  • MS or PhD in Electrical/Computer Engineering or related field.
  • Deep expertise in heterogeneous SoCs and accelerator architectures.
  • Proven leadership on complex silicon programs with strong tradeoff skills.

Responsibilities

  • Own and lead next-gen SoC architecture for multi‑processor subsystems and accelerators.
  • Define long-term architectural strategy aligned with product roadmaps and customer needs.
  • Write detailed SoC architecture specifications for compute, memory, interconnect, and security.
  • Guide RTL, verification, physical design, firmware, software and platform teams.
  • Collaborate with AI/Data Center/Security/Embedded customers to extract requirements.
  • Evaluate new IP (cores, accelerators) and interconnect protocols (PCIe/CXL/Ethernet/UCIe/UAL).
  • Lead PPA trade-offs to balance cost, performance, power, and manufacturability.
  • Mentor architects and drive cross‑domain innovation in security and power management.

Skills

SoC architecture
Processor cores
Interconnect protocols
Technical leadership

Education

MS or PhD in Electrical/Computer Engineering
Patents/publications a plus

Tools

Simulation frameworks

Job description

AMD is seeking a senior SoC Architect to lead architecture definition for next-generation heterogeneous SoCs spanning AI, Data Center, Security, and Embedded Computing. You will shape system-level design, drive performance and power tradeoffs, and guide RTL, verification, physical design, firmware, software, and customer engineering.

Ideal candidates hold MS/PhD in EE/CE with deep expertise in processor subsystems (x86/ARM/RISC‑V), PCIe, UCIe, memory hierarchies, and interconnects, delivering

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