Senior Silicon Validation Engineer – Optical/SerDes

Ayar Labs; San Jose (CA); On-site; USD 160,000 - 192,000; Full time

Job summary

Ayar Labs seeks an experienced engineer in San Jose, CA for silicon bringup and validation. The selected candidate will engage in the characterization of high-speed SerDes interfaces and develop Python-based automation frameworks for testing.

Applicants should possess a Bachelor's degree in Electrical Engineering with relevant experience. Responsibilities include collaborating with cross-functional teams and ensuring product validation meets specifications before deployment. The role offers a salary range of $160,000 - $192,000.

Qualifications

• 3+ years of relevant industry experience.
• Hands-on experience with high-speed SoC or mixed-signal devices.
• Strong understanding of SerDes PHY operation and characterization.
• Proficient in test scripting using Python.

Responsibilities

• Perform initial power-on of new silicon tape-outs.
• Characterize high-speed SerDes interfaces.
• Develop automation frameworks for regression testing.
• Collaborate with engineering teams throughout development.

Skills

Post-silicon bringup

Electrical characterization

Python scripting

Lab equipment proficiency

Troubleshooting skills

Education

Bachelor's degree in Electrical Engineering

Tools

BERT

Oscilloscope

Signal analyzers

Version control (Git)

Job description

Ayar Labs seeks an experienced engineer in San Jose, CA for silicon bringup and validation. The selected candidate will engage in the characterization of high-speed SerDes interfaces and develop Python-based automation frameworks for testing.

Applicants should possess a Bachelor's degree in Electrical Engineering with relevant experience. Responsibilities include collaborating with cross-functional teams and ensuring product validation meets specifications before deployment. The role offers a salary range of $160,000 - $192,000.