Senior Silicon Validation Engineer

Highbrow Technology Inc; Fremont (CA); On-site; USD 130,000 - 195,000; Full time

Job summary

Highbrow Technology Inc. is seeking a Senior Silicon Validation Engineer to lead post-silicon validation for power and IO interfaces in complex SoCs. You will design and execute tests to ensure power integrity, performance, and signaling reliability across modules.

You will collaborate with design, firmware, and board bring-up teams, develop automated test benches in Python/C++, and use high-end lab equipment to validate I2C, SPI, QSPI, MIPI protocols and power architectures.

Qualifications

• Post-silicon validation experience in ASICs or SoCs.
• Experience validating power management, rails, and IO interfaces.
• Proficiency with Python or C/C++ for test automation.

Responsibilities

• Plan, develop, and execute post-silicon power validation test plans.
• Characterize power consumption, voltage droop, and noise across workloads.
• Validate IO interfaces (I2C, SPI, QSPI, MIPI) and develop automated test benches.
• Collaborate with Design, Firmware, and Board teams to debug issues and improve silicon.
• Document validation coverage and failure analyses.

Skills

Power management validation

IO interface validation

Python/C++ scripting

Lab equipment operation

Debugging & problem-solving

Education

Bachelor's/Master's in Electrical Engineering or related field

Tools

Oscilloscopes

Logic analyzers

Protocol analyzers

BERTs

DC power supplies

Multimeters

Job description

Senior Silicon Validation Engineer (Power & IO Interfaces)

Location: Fremont, CA (5 days on-site)

Type: Full-time/Permanent

About the Role:

We are seeking a highly motivated and experienced Silicon Validation Engineer to join our cutting-edge hardware engineering team. In this role, you will be responsible for the post-silicon validation of complex System-on-Chips (SoCs), focusing specifically on Power Management and high-speed/low speed IO Interfaces (including I2C, SPI, QSPI, and MIPI protocols). You will work closely with design, firmware, and board bring-up teams to ensure silicon robustness, power efficiency, and signal integrity.

Key Responsibilities:

Power Validation:

• Plan, develop, and execute post-silicon validation test plans for power delivery networks, power states (C-states, P-states, low-power modes), and voltage regulators (PMICs).
• Characterize power consumption, thermal limits, voltage droop, and power supply noise under various workloads.
• Debug power-up/power-down sequencing issues and optimize power management firmware.

IO Interface Validation:

• Validate low-speed and high-speed serial/parallel communication protocols including I2C, SPI, QSPI, and MIPI (e.g., MIPI D-PHY/C-PHY, CSI/DSI) on custom silicon.
• Develop automated test benches, scripts (Python/C++), and test vectors for functional, stress, and compliance testing of IO interfaces.
• Perform signal integrity (SI) and protocol compliance testing using high-speed oscilloscopes, logic analyzers, protocol analyzers, and BERTs.

Cross-Functional Collaboration:

• Work hand-in-hand with Design, Verification, Firmware, and Board Design teams to root-cause silicon bugs and recommend design improvements.
• Document test procedures, validation coverage reports, and failure analysis logs.

Required Qualifications & Skills:

• Work Authorization: U.S. Citizens, Green Card Holders, or authorized EAD candidates only. (Please note: We are unable to sponsor or transfer visas, including H-1B, at this time).
• Education: B.S. or M.S. in Electrical Engineering, Computer Engineering, or a related field.
• Experience: 4+ years of post-silicon validation experience in ASICs or SoCs.

Technical Expertise:

• Hands-on experience validating power management architectures, power rails, and low-power states.
• Deep understanding and validation experience of communication protocols: I2C, SPI, QSPI, and MIPI.
• Proficiency in lab equipment usage: Oscilloscopes, logic analyzers, protocol analyzers, DC power supplies, and multi-meters.
• Strong programming and automation skills in Python or C/C++.
• Soft Skills: Excellent debugging, problem-solving, and cross-functional communication skills.

Preferred Qualifications:

• Experience with automated test equipment (ATE) or bench automation frameworks.
• Familiarity with board bring-up and schematic/layout review.
• Knowledge of power modeling and correlation between pre-silicon simulations and post silicon measurements.