Senior SerDes Characterization Engineer – Platforms

Socket.dev; Sunnyvale (CA); On-site; USD 188,000 - 274,000; Full time

Job summary

Google’s Platforms team is seeking a highly skilled engineer to design and validate SerDes interfaces across next-generation compute and networking platforms. You will lead transmitter and receiver characterization, develop advanced test methodologies, and deploy high-bandwidth test instrumentation to drive automated, repeatable measurements.

The role involves cross-functional collaboration with ASIC PHY design, silicon validation, and signal integrity teams, with a focus on improving link

Qualifications

• Bachelor's degree or equivalent practical experience in a related engineering field.
• 6 years of experience in high-speed SerDes validation, physical layer testing, or RF/high-speed measurement.
• 3 years of experience with transmitter and receiver characterization, JTOL testing, and high-speed BERT/AWG instrumentation.

Responsibilities

• Own transmitter and receiver characterization and compliance testing for SerDes interfaces across next-generation compute and networking platforms.
• Lead the development of advanced RX test methodologies including jitter tolerance and stressed receiver sensitivity tests.
• Master and deploy high-bandwidth lab instrumentation such as high-speed AWGs, BER testers, oscilloscopes, and VNAs.
• Collaborate with ASIC PHY design, silicon validation, and signal integrity teams to root-cause performance issues.
• Drive test automation development to maximize test coverage and repeatability.

Skills

SerDes validation

High-speed measurement

Transmitter characterization

Receiver characterization

Education

Bachelor's degree in Electrical Engineering, Computer Engineering, Physics, or related field

PhD in Electrical Engineering, Computer Engineering, Physics, or related field

Tools

Oscilloscopes

Vector Network Analyzers

BERT/AWG instrumentation

Job description

Google’s Platforms team is seeking a highly skilled engineer to design and validate SerDes interfaces across next-generation compute and networking platforms. You will lead transmitter and receiver characterization, develop advanced test methodologies, and deploy high-bandwidth test instrumentation to drive automated, repeatable measurements.

The role involves cross-functional collaboration with ASIC PHY design, silicon validation, and signal integrity teams, with a focus on improving link