Senior SerDes Characterization Engineer, High Speed Platforms

Google Inc.; Sunnyvale (CA); On-site; USD 159,000 - 230,000; Full time

Benefits offered by this job

Equity

Bonus target

Benefits

Job summary

Google Sunnyvale is hiring a Senior SerDes Characterization Engineer for Platforms to drive TX/RX characterization and test automation. You will work across compute and networking platforms, applying SI expertise from circuit to system level and partnering with PHY/resource teams.

The role emphasizes strong Python/C++ skills, lab independence, and collaboration to deliver scalable test suites and data-driven insights for data center silicon health.

Qualifications

• Master's or PhD in Electrical/Computer Engineering or related field.
• Experience with SerDes TX compliance testing and high-speed signal integrity.
• Understanding of SerDes IO circuits, S-parameters, fixture de-embedding, and transmission line theory.
• Proficiency in Python, MATLAB, or C++ for automated instrument control and data extraction.
• Strong collaboration and ability to work independently in a fast-moving lab.

Responsibilities

• Own transmitter and receiver characterization for SerDes interfaces across compute/networking platforms.
• Execute TX physical layer metrics analysis and test compliance per IEEE and related specs.
• Define and deploy automated test suites with advanced test equipment.
• Collaborate with PHY design and signal integrity engineers to optimize transmitter drive settings.
• Develop data processing pipelines and visualization dashboards for silicon health.

Skills

SerDes

Python

MATLAB

C++

Test automation

Data analysis

Education

Master's or PhD in Electrical/Computer Engineering or related field

Tools

High-performance oscilloscopes

Phase noise analyzers

Spectrum analyzers

VISA/SCPI control

Job description

Google Sunnyvale is hiring a Senior SerDes Characterization Engineer for Platforms to drive TX/RX characterization and test automation. You will work across compute and networking platforms, applying SI expertise from circuit to system level and partnering with PHY/resource teams.

The role emphasizes strong Python/C++ skills, lab independence, and collaboration to deliver scalable test suites and data-driven insights for data center silicon health.