Senior Serdes Architect

Mulya Technologies; Austin (TX); Hybrid; USD 180,000 - 240,000; Full time

Job summary

Mulya Technologies is seeking a Senior SerDes Architect to lead PAM4 ADC/DAC based wireline technology development. You will drive transistor-level design from initial spec, through layout supervision, silicon evaluation and finally product introduction to market.

The role requires deep expertise in analog/mixed-signal design, strong lab skills, and a track record of delivering designs to production while collaborating with customers globally.

Qualifications

• 10–20 years in analog or mixed-signal IC development on advanced CMOS.
• Strong familiarity with high-speed PAM4 architectures.
• Experience designing building blocks: bandgap, op-amp, comparators, DLL/PLL.
• Understand equalization techniques (analog and digital).
• Track record of taking designs to production.
• Able to work with customers to define product needs.
• Experience evaluating silicon on bench and with standard lab equipment.

Responsibilities

• Lead development of PAM4-based wireline technologies from spec to market.
• Collaborate with customers to understand requirements and translate into designs.
• Oversee design to layout supervision, silicon evaluation and product introduction.
• Coordinate with teams across geographic locations to meet schedules.

Skills

PAM4 architectures

Transistor-level design

Lab bench testing

Customer collaboration

Schematic capture

HSPICE

Spectre

Layout parasitics

MATLAB (optional)

Tools

Cadence Virtuoso

Cadence tools

Synthesis/Modeling Tools

Job description

Hybrid

We are at the forefront of Wideband Signal Processing™ delivering high-performance, low-power analog-to-digital converters (ADCs), digital-to-analog converters (DACs), and other mixed-signal IP cores. These components are crucial for a wide array of modern applications, including artificial intelligence (AI) infrastructure, advanced wireless communications like:

• 5G networks and optical communications
• Automotive networking, LiDAR, and radar systems
• SatComm, Software Defined Radio (SDR) and other broadband communications

SeniorSerDes architect and development lead focused on PAM4 ADC and DAC based wireline technologies. The successful candidate in this role will work with customers to understand requirements, and will lead the development of high performance transistor level design starting from initial specification, through design and layout supervision, silicon evaluation and characterization to final product introduction to market.

Qualifications

• 10-20 years of experience in high-performance analog or mixed-signal IC development in advanced CMOS processes
• Thorough familiarity with high-speed PAM4 architectures and topologies
• Experience in designing high performance building block circuits such as bandgap reference, op-amp, comparators, oscillators, DLL, PLL, CTLEs, CDRs, etc.
• Thorough understanding of equalization techniques (both analog and digital)
• Must have a track record of successfully taking designs to production
• Ability to work with customers to define products that address needs
• Must have experience with evaluating silicon on bench and familiarity with standard lab equipment
• Strong intuitive and analytical understanding of transistor-level circuit design including noise and mismatch analysis
• Experience with analog and digital behavioral modeling, and/or synthesis of digital control blocks
• Familiar with Cadence schematic capture, virtuoso, Spectre and/or HSPICE circuit simulation tools
• MATLAB understanding would be preferred but not mandatory
• Familiar with designing circuits for electromigration and ESD compliance in submicron CMOS process
• Must be familiar with layout parasitic extraction tools and layout dependent impairments in advanced CMOS processes
• Must be able to work independently, create and adhere to schedules
• Must possess strong written and verbal communication skills with an ability to work with teams spread across geographic locations
• Should be able to seek help proactively as well as share and pass on knowledge