Senior Satellite FPGA Design & Verification Engineer

Blue Origin; Los Angeles (CA); On-site; USD 157,000 - 220,000; Full time

Benefits offered by this job

Medical, dental, vision

401(k) match up to 5%

Stock options

Paid time off

Education support program

Job summary

Blue Origin in Los Angeles, CA is seeking an experienced Senior Digital Design Engineer to design and implement RTL for high reliability satellite avionics and coordinate SoC integration. You will work on architecture optimization, verification strategies, and interfacing with firmware/software teams.

The role requires strong SystemVerilog, FPGA flow experience, and hands-on proof with Questasim; you will participate in design reviews, troubleshoot complex digital issues, and help push

Qualifications

• B.S. or higher in Electrical Engineering, Computer Engineering, or a related discipline.
• 7+ years of experience in digital design and SoC architecture.
• Proficiency in SystemVerilog or Verilog for RTL implementation.
• Experience with SoC integration and interface design.
• Understanding of digital timing and synchronization concepts.
• Knowledge of industry-standard bus protocols (AXI, AHB, etc.).
• Familiarity with synthesis tools and RTL-to-gates methodology.
• Experience with simulation and debugging of complex digital systems.
• Strong background in FPGA and FPGA tool flow.
• Solid knowledge of simulation-based test using Questasim, and evaluation of code coverage metrics.

Responsibilities

• Design and develop digital hardware architectures for high reliability satellite avionics.
• Create and implement RTL code for critical SoC blocks and interfaces.
• Contribute to architecture optimization for performance, power, and cost trade-offs.
• Collaborate on design verification to ensure robust and reliable designs.
• Participate in advanced verification techniques: Assertion-Based Verification, UVM, and constrained random verification.
• Support prototype development for early validation.
• Document design specifications, architecture decisions, and implementation details.
• Participate in design reviews and technical discussions with cross-functional teams.
• Troubleshoot and debug complex digital design issues.
• Implement interfaces between digital hardware and firmware/software components.
• Research and evaluate new architectural approaches to meet evolving requirements.

Skills

SystemVerilog/Verilog

SoC architecture

FPGA tool flow

SoC integration

Digital timing

Bus protocols (AXI/AHB)

Debugging complex designs

Education

B.S./M.S. in Electrical or Computer Engineering

Tools

QuestaSim

Synthesis tools

RTL-to-gates workflow

Job description

Blue Origin in Los Angeles, CA is seeking an experienced Senior Digital Design Engineer to design and implement RTL for high reliability satellite avionics and coordinate SoC integration. You will work on architecture optimization, verification strategies, and interfacing with firmware/software teams.

The role requires strong SystemVerilog, FPGA flow experience, and hands-on proof with Questasim; you will participate in design reviews, troubleshoot complex digital issues, and help push