A leading technology company in San Diego is seeking a Sr. RFIC - PLL Design Engineer to drive analog and digital PLL solutions for wireless SoCs. In this role, you will collaborate with cross-functional teams to define radio features and oversee critical design verification processes. Ideal candidates have over 10 years of experience in RF circuit design and familiarity with tools like Cadence Virtuoso. The position offers a competitive salary range from $171,600 to $302,200 and various employee benefits.
Qualifications
10+ years of relevant industry experience.
Experience in designing PLL building blocks.
Deep understanding of RF circuit design concepts.
Responsibilities
Design and develop analog and digital PLL building blocks.
Collaborate with cross-functional teams on radio features.
Oversee layout, floor planning, and verification of designs.
Skills
Analog and Digital PLL design
RF circuit design
Cadence Virtuoso
EM simulation tools
Education
BS in relevant field
Tools
Spectre RF
Matlab
Job description
A leading technology company in San Diego is seeking a Sr. RFIC - PLL Design Engineer to drive analog and digital PLL solutions for wireless SoCs. In this role, you will collaborate with cross-functional teams to define radio features and oversee critical design verification processes. Ideal candidates have over 10 years of experience in RF circuit design and familiarity with tools like Cadence Virtuoso. The position offers a competitive salary range from $171,600 to $302,200 and various employee benefits.