Senior RFIC & mmWave Transceiver Architect

Amazon; Sunnyvale (CA); On-site; USD 183,000 - 248,000; Full time

Job summary

Amazon Leo is seeking a Senior RFIC Design Engineer to architect, design, and optimize RF front-end modules for Kuiper satellites. You will collaborate with cross-functional teams to define transceiver architectures, perform simulations, and drive area- and power-efficient solutions from concept to production.

You will work on on-chip inductors, baluns, PLLs, and RF blocks, ensuring robust performance across process corners and environmental conditions, with a focus on scalable, cost-effective

Qualifications

• Bachelor's degree in Electrical Engineering or related field.
• 7+ years in mm-Wave/RFIC design, preferably at advanced nodes.
• Knowledge of current and upcoming RF standards (4G/5G NR, WiMAX, 802.11ad).

Responsibilities

• Collaborate with systems, digital design, and chip teams to specify transceivers and RFIC models.
• Lead area- and power-efficient RFIC chips with multiple transceiver chains.
• Work with packaging/HW/EE/FW teams for system integration.
• Define analog/digital boundary requirements for calibration, clocks, timing.
• Explore mm-wave/RF architectures and present trade-offs.
• Design and simulate on-chip inductors, baluns, power combiners in EMX/HFSS.
• Perform layout, extraction, and sign-off across corners for volume production.
• Specify bench and production test plans.
• Guide verification and validation activities.

Skills

mm-Wave RFIC design

transceivers

beamforming

LNA/PA design

RF front-end

Education

Bachelor's degree in Electrical Engineering

Master's degree or Ph.D.

Tools

EMX

HFSS

Job description

Amazon Leo is seeking a Senior RFIC Design Engineer to architect, design, and optimize RF front-end modules for Kuiper satellites. You will collaborate with cross-functional teams to define transceiver architectures, perform simulations, and drive area- and power-efficient solutions from concept to production.

You will work on on-chip inductors, baluns, PLLs, and RF blocks, ensuring robust performance across process corners and environmental conditions, with a focus on scalable, cost-effective