Senior Quantum Electronics Engineer — Superconducting Circuits

Google; United States; On-site; USD 174,000 - 252,000; Full time

Job summary

Google Quantum AI is seeking a Senior Research Scientist to design and simulate superconducting digital logic circuits for qubit control and readout, working with qubit designers and cryogenic electronics teams. The role requires a strong publication record and experience leading an R&D group toward tape-out, with hands-on design flow and low-temperature measurements.

You will contribute to building a scalable, integrated quantum processor stack and advance the roadmap toward error-corrected

Qualifications

• Master's degree in Electrical Engineering, Physics, related engineering discipline, or equivalent practical experience.
• Experience in superconductor logic families (RSFQ, ERSFQ, RQL, HFQ, AQFP).
• Experience performing tape-out of a superconducting IC chip.
• One or more published research paper or presentation at a relevant scientific conference.

Responsibilities

• Design and simulate superconducting digital logic circuits for qubit control and readout.
• Develop superconducting digital logic systems enabling multiplexed qubit control and readout.
• Address issues in integration of superconducting digital electronics and ensure signal integrity.
• Collaborate with teams focused on design, fabrication, and measurement to validate quantum processors.

Skills

Leadership in R&D

Mentoring

Qubit control design

Co-design collaboration

Education

Master's degree in Electrical Engineering or Physics or related field

PhD in physics or electrical engineering (preferred)

Tools

Computer-aided design tools

Electromagnetic simulation tools

Job description

Google Quantum AI is seeking a Senior Research Scientist to design and simulate superconducting digital logic circuits for qubit control and readout, working with qubit designers and cryogenic electronics teams. The role requires a strong publication record and experience leading an R&D group toward tape-out, with hands-on design flow and low-temperature measurements.

You will contribute to building a scalable, integrated quantum processor stack and advance the roadmap toward error-corrected