Senior Principal AE-RF Design Engineer

Cadence

Burlington (MA)

On-site

USD 140,000 - 230,000

Full time

14 days+

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Job summary

Cadence is seeking an experienced mmWave IC Designer to lead high-frequency transceiver projects from concept through tape-out and lab validation.

You will drive parasitic extraction, thermal management, and RF modeling while engaging customers in a fast-paced design environment. A strong background in PAs/LNAs, RF PLLs, and RF blocks is essential.

Qualifications

  • 10+ years of industrial experience from concept through tape-out to lab validation.
  • Experience with high-frequency lab characterization using spectrum analyzers, VNAs, and probe stations.
  • Education: MSc or PhD in Electrical Engineering or closely related field.

Responsibilities

  • Tackle parasitic extraction, thermal management, and high-frequency electromagnetic modeling across the full product lifecycle.
  • Develop and optimize RF blocks (PAs, LNAs, mixers, VCOs) and RF subsystems for Tx/Rx chains.
  • Engage with customers at a fast pace to define and deliver state-of-the-art mmWave designs.

Skills

mmWave IC design
RF transceiver architectures
High-frequency modeling
Lab characterization
Customer engagement
Thermal management

Education

MSc or PhD in Electrical Engineering

Tools

Cadence Virtuoso
VRF flows
EMX
Clarity
VSS
QRC
Pegasus

Job description

At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.

Experienced Millimeter-Wave (mmWave) IC Designer Specialize In Engineering High-frequency (30 GHz+) Transceivers And Components For 5G/6G Communications, Aerospace Radar, And Automotive Sensors. Will Drive The Full Product Lifecycle, Tackling Challenges Like Parasitic Extraction, Thermal Management, And High-frequency Electromagnetic Modeling. High Level Of Customer Engagement At a Fast Pace On State Of The Art Design. Requires a Deep, Specialized Skill Set

  • Building Blocks: Deep expertise in designing custom blocks such as Power Amplifiers (PAs), Low Noise Amplifiers (LNAs), mixers, and Voltage-Controlled Oscillators (VCOs).
  • RF Subsystem: Deep expertise in designing Tx and Rx signal chains for noise, figure, linearity dynamic range and power efficiency. Deep experience in RF PLL design including Sigma delta, FRAC-N PLL. Phase noise and spurius signal, settling time. Experience with PLL buildng blocks such as PFD, charge pumps, dividers, multipliers.
  • Architecture: Proficiency in RF transceiver architectures, direct-conversion topologies, and phased-array systems. Signal chain analysis and system figures of merit such as ACPR, EVM and BER.
  • Process Technologies: Hands-on experience on advanced nodes using RF SOI process and deep knowledge of the required trade offs.
  • Software Tools: Mastery of standard EDA software environments, including:
    • System Simulation: VSS -
    • Schematic & Simulation: Cadence Virtuoso and VRF flows
    • Electromagnetic (EM) Simulation: EMX, and Clarity
    • Layout & Verification: Layout MXL, QRC and Pegasus
  • Education: Usually an M.Sc. or Ph.D. in Electrical Engineering (or a closely related discipline).
  • Experience: 10+ years of industrial experience taking designs from conception through tape-out to final lab validation.
  • Validation: Extensive lab characterization experience utilizing high-frequency equipment like spectrum analyzers, VNAs, and probe stations.
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