Senior Principal Foundry Interface Engineer (Yield & AI)

SiTime Corp.; Santa Clara (CA); On-site; USD 180,000 - 240,000; Full time

Benefits offered by this job

Equity grants

Quarterly bonus tied to innovation

Health benefits

Job summary

SiTime Corp. is seeking a seasoned Foundry Yield Engineer to join our advanced MEMS timing team in Santa Clara, CA.

You will collaborate with foundries, drive yield improvements, and guide transfer projects while leveraging big data analytics to optimize inline process health and end-of-line performance. The role emphasizes leadership, clear communication, and the ability to manage multiple complex projects in a fast-paced semiconductor environment, with a strong focus on automotive and

Qualifications

• Master’s degree with 13+ years or PhD with 10+ years in Semiconductor Process Integration, Device Engineering, or Wafer Yield Engineering.
• English proficiency required for professional communication.
• Proven track record in yield Pareto construction, modeling and roadmaps.
• Experience with PDF Exensio or other Big Data Analysis tools.
• Extensive experience collaborating with foundries and porting between fabs.
• Ability to interpret complex product data (inline, e-test, SORT) to drive solutions.
• Knowledge of wafer inline inspection methods and SORT programs.
• Knowledge of semiconductor device reliability and DFM/PFMEA.
• Experience supporting wafer fulfillment for Automotive AEC_Q100, ISO 26262.

Responsibilities

• Lead Foundry yield improvement through mitigation of systematic and parametric yield detractors.
• Manage Foundry yield excursion and implement Continuous Improvement Plan.
• Manage Foundry safe launch.
• Provide technical guidance on Foundry Fab transfer projects.
• During development, direct wafer lot progress, process skew splits and DOE strategies.
• Manage compliance with fab yield, E-test, WAT, inline Cp/CpK metrics.
• Apply AI/ML predictive modeling to improve test chips yield and performance.
• Serve as technical liaison to Foundries, communicate process health status to stakeholders, drive on-time wafer release, and resolve escalations.

Skills

Yield improvement

Data analysis

Project management

Communication skills

Leadership

Education

Master’s degree or PhD in a relevant field

Tools

PDF Exensio

Big Data Analysis tools

Job description

SiTime Corp. is seeking a seasoned Foundry Yield Engineer to join our advanced MEMS timing team in Santa Clara, CA.

You will collaborate with foundries, drive yield improvements, and guide transfer projects while leveraging big data analytics to optimize inline process health and end-of-line performance. The role emphasizes leadership, clear communication, and the ability to manage multiple complex projects in a fast-paced semiconductor environment, with a strong focus on automotive and