Senior / Principal DRAM Product Development Engineer – DEG Technology

Micron Technology Inc; Boise (ID); On-site; USD 120,000 - 180,000; Full time

Benefits offered by this job

Medical, dental and vision plans

Paid time off

Competitive 401(k)

Job summary

Micron Technology is seeking an experienced engineer to design, verify, and optimize memory and related circuits across advanced technology nodes. You will own major data path blocks, lead cross-functional initiatives, and drive AI-enabled automation to improve yield and performance.

The role requires strong technical leadership with experience in DRAM/NAND interfaces and a proven track record in silicon verification and layout optimization.

Qualifications

• Bachelor’s degree in Electrical or Computer Engineering or Physics (emphasis on semi electronics) or equivalent.
• Senior: 2–5 years of relevant experience.
• Principal: 8+ years of relevant experience.
• Experience with DRAM, NAND, Logic, or related interfaces.

Responsibilities

• Design, analyze, and verify memory, logic, and analog circuits across advanced technology nodes.
• Own and support major data path blocks including Sense Amplifiers, timing distribution, calibration, and training features.
• Identify design marginalities and recommend circuit-level or architectural solutions to improve DRAM robustness, yield, and performance.
• Enable new process node startup, qualification, yield learning, and production ramp.
• Provide technical guidance to Technology Development teams using strong process and device integration knowledge.
• Develop and track key metrics to assess technology readiness.
• Support design verification and validation using CAD tools, modeling, and simulation.
• Define and execute silicon experiments and debug strategies in collaboration with Product Engineering.
• Perform electrical failure analysis of DRAM Array Sensing Schemes and lead yield improvement initiatives using statistical analysis.
• Guide Sense Amp layout activities including floor planning, placement, routing, and layout reviews.
• Perform parasitic extraction and modeling to optimize signal margin and memory bit interaction of Sense Amps and Wordline drivers.
• Drive layout-aware optimization decisions to improve scalability and manufacturability.
• Collaborate with Design, Technology Development, DFT, Test, Reliability, Quality, Manufacturing, Probe, Assembly, and Marketing teams.
• Partner with Applications Engineering to evaluate specifications and balance customer requirements with design and process constraints.
• Leverage AI-based tools, automation, and advanced analytics to improve design quality, yield learning, and workflow efficiency.
• Drive innovation for future memory generations.
• Document methodologies clearly, present results to technical forums and leadership, mentor junior engineers, and lead complex cross-functional initiatives.

Skills

Strong communication

Technical leadership

AI in engineering workflows

Education

Bachelor’s degree in Electrical or Computer Engineering or Physics (emphasis on semiconductor electronics)

Master’s degree in Electrical or Computer Engineering or Physics (emphasis on semiconductor electronics)

Tools

CAD tools

Modeling

Parasitic extraction

Job description

Our vision is to transform how the world uses information to enrich life for all.

Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever.

Key Responsibilities

Technical Expertise & Design Enablement

Design, analyze, and verify memory, logic, and analog circuits across advanced technology nodes. Own and support major data path blocks including Sense Amplifiers, timing distribution, calibration, and training features. Identify design marginalities and recommend circuit-level or architectural solutions to improve DRAM robustness, yield, and performance.

Technology Development & Product Ramp

Enable new process node startup, qualification, yield learning, and production ramp. Provide technical guidance to Technology Development teams using strong process and device integration knowledge. Develop and track key metrics to assess technology readiness.

Verification, Silicon Bring-up & Yield

Support design verification and validation using CAD tools, modeling, and simulation. Define and execute silicon experiments and debug strategies in collaboration with Product Engineering. Perform electrical failure analysis of DRAM Array Sensing Schemes and lead yield improvement initiatives using statistical analysis.

Layout, Modeling & Optimization

Guide Sense Amp layout activities including floor planning, placement, routing, and layout reviews. Perform parasitic extraction and modeling to optimize signal margin and memory bit interaction of Sense Amps and Wordline drivers. Drive layout-aware optimization decisions to improve scalability and manufacturability.

Cross-Functional Collaboration

Collaborate with Design, Technology Development, DFT, Test, Reliability, Quality, Manufacturing, Probe, Assembly, and Marketing teams. Partner with Applications Engineering to evaluate specifications and balance customer requirements with design and process constraints.

Innovation & Automation

Leverage AI-based tools, automation, and advanced analytics to improve design quality, yield learning, and workflow efficiency. Drive innovation for future memory generations.

Technical Leadership

Document methodologies clearly, present results to technical forums and leadership, mentor junior engineers, and lead complex cross-functional initiatives.

Minimum Qualifications

• Bachelor’s degree in Electrical or Computer Engineering or Physics (emphasis on semi electronics) or equivalent.
• Senior: 2–5 years of relevant experience in the following:
• Principal: 8+ years of relevant experience in the following:
• Experience with DRAM, NAND, Logic, or related interfaces.

Preferred Qualifications

• Master’s degree in Electrical or Computer Engineering or Physics (emphasis on semi electronics) or equivalent
• Deep understanding of high-speed IO, SI/PI, PDN, CMOS device physics, and BSIM modeling.
• Experience applying AI or automation to engineering workflows.
• Strong communication and technical leadership skills.

Micron benefits are designed to help you stay well, provide peace of mind and help you prepare for the future. We offer a choice of medical, dental and vision plans in all locations enabling team members to select the plans that best meet their family healthcare needs and budget. Micron also provides benefit programs that help protect your income if you are unable to work due to illness or injury, and paid family leave. Additionally, Micron benefits include a robust paid time-off program and paid holidays. For additional information regarding the Benefit programs available, please see the Benefits Guide posted on micron.com/careers/benefits.

Micron is proud to be an equal opportunity workplace and is an affirmative action employer. All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, age, national origin, citizenship status, disability, protected veteran status, gender identity or any other factor protected by applicable federal, state, or local laws.

Micron Prohibits the use of child labor and complies with all applicable laws, rules, regulations, and other international and industry labor standards.

Micron does not charge candidates any recruitment fees or unlawfully collect any other payment from candidates as consideration for their employment with Micron.