Principal Memory Design Engineer, HBM

Micron; Garland (TX); On-site; USD 150,000 - 210,000; Full time

Benefits offered by this job

Medical, dental & vision plans

Paid time off and holidays

Equal opportunity employer

Job summary

Micron Technology is seeking a Principal Design Engineer to architect and deliver high‑performance DRAM circuits for advanced technology nodes. You will lead circuit building, layout, verification and silicon validation, partnering with multiple teams to deliver scalable, manufacturable memory solutions.

You will influence performance, power, reliability and time‑to‑market while guiding reviews, documentation and best‑practice standards across design and layout groups.

Qualifications

• BS in Electrical Engineering or related field with advanced CMOS/analog coursework.
• Strong Cadence Virtuoso, physical layout and floorplanning experience.
• Proven experience using FINESIM, HSPICE and VERILOG for circuit sims.
• Ability to solve ambitious technical problems with design impact.
• Deep knowledge of DRAM subsystem architecture and operation.

Responsibilities

• Design and optimize DRAM circuits across digital, analog and memory cores.
• Develop floorplans, routing, power networks, margins, timings and die-size tradeoffs.
• Run advanced circuit simulations for speed, power, noise and reliability.
• Model parasitics, verify power/signal integrity, support tape-outs.
• Lead reviews and standardize best practices across design teams.
• Coordinate layout and build resources and manage critical paths.

Skills

Electrical engineering fundamentals

Cadence Virtuoso

Physical layout

Circuit floorplanning

Finite element/analog SPICE tools

Education

Bachelor's degree in Electrical Engineering

MS or PhD in Electrical Engineering

Tools

FINESIM

HSPICE

VERILOG

Job description

About the Role

Our vision is to transform how the world uses information to enrich life for all. Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. As a Principal Design Engineer, you will build the future of memory by architecting and delivering high‑performance DRAM circuit compositions for advanced technology nodes. In this highly visible technical leadership role, you’ll develop innovation across building, layout, verification, and silicon validation. You will collaborate closely with multi‑functional teams to deliver scalable, manufacturable solutions for next‑generation memory products. Your work will directly influence performance, power, reliability, and time‑to‑market for Micron’s groundbreaking memory technologies.

Responsibilities

• Design and optimize DRAM circuits spanning digital, analog, and memory core subsystems to meet aggressive power, performance, and reliability targets


• Develop and refine floorplans, routing strategies, power delivery networks, sense margins, timings, and die‑size tradeoffs


• Perform advanced circuit simulations using FINESIM, HSPICE, and VERILOG, analyzing speed, power, noise, and long‑term reliability


• Model parasitics, verify power and signal integrity, and support validation, reticle experiments, and tape‑out revisions


• Drive simulation‑to‑silicon correlation, identify gaps, and recommend schematic and layout improvements


• Lead technical reviews, documentation, and best‑practice standardization across design and layout teams


• Coordinate and manage layout and build resources, tracking breakthroughs and resolving critical path issues


• Serve as a key technical interface across design, verification, test, and technology development while communicating project status and risks

Minimum Qualifications

• BS in Electrical Engineering or related field, or equivalent experience, with advanced coursework in CMOS circuit building, VLSI, and analog circuits


• Strong hands‑on expertise with Cadence Virtuoso, physical layout, and circuit floorplanning


• Proven experience using FINESIM, HSPICE, and VERILOG for complex circuit simulation and analysis


• Demonstrated ability to solve ambitious technical problems with significant design or innovation impact


• Deep knowledge of DRAM subsystem architecture, operation, or building, with experience leading multi‑functional technical efforts

Preferred Qualifications

• MS or PhD in Electrical Engineering or a related field, or equivalent experience


• Strong industry awareness of memory technology trends and emerging design methodologies


• Exceptional communication and leadership skills with the ability to influence across organizations (LLM)

Benefits

Micron benefits are designed to help you stay well, provide peace of mind and help you prepare for the future.

• We offer a choice of medical, dental and vision plans in all locations enabling team members to select the plans that best meet their family healthcare needs and budget


• Micron also provides benefit programs that help protect your income if you are unable to work due to illness or injury, and paid family leave


• Additionally, Micron benefits include a robust paid time‑off program and paid holidays

Micron is proud to be an equal opportunity workplace and is an affirmative action employer. All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, age, national origin, citizenship status, disability, protected veteran status, gender identity or any other factor protected by applicable federal, state, or local laws.

For US Sites Only: To request assistance with the application process and/or for reasonable accommodations, please contact Micron’s People Organization at [e-mail] or 1-800-336-8918 (select option #3)

Micron Prohibits the use of child labor and complies with all applicable laws, rules, regulations, and other international and industry labor standards. Micron does not charge candidates any recruitment fees or unlawfully collect any other payment from candidates as consideration for their employment with Micron.