Senior Principal DRAM Applications & Validation Engineer

Rambus; San Jose (CA); Hybrid; USD 157,600 - 292,600; Full time

Benefits offered by this job

Flexible work environment

Competitive compensation package

Diversity and Inclusion initiatives

Job summary

Rambus, located in San Jose, is looking for a Sr Principal Applications Engineer to tackle complex DRAM and memory interface issues. The successful candidate will support international customers and work with cutting-edge technologies in a hybrid work setup.

Ideal candidates will have substantial experience in hardware design and excellent communication skills, coupled with a BS degree in Electrical Engineering or related field. The position offers a competitive salary range of $157,600 to $292,600 based on experience.

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Qualifications

• 12+ years of experience in hardware design, validation, and/or applications engineering.
• Excellent verbal and written communication skills in English and Korean.
• Good understanding of I2C/I3C serial interfaces.

Responsibilities

• Analyze and debug technical issues involving server memory.
• Support technical qualification of new chip designs.
• Prepare technical documentation such as datasheets and user guides.

Skills

DDR4/DDR5 DIMM memory operation

Signal integrity analysis

Scripting languages (Perl, Tcl, Python)

High-speed oscilloscopes usage

Root-cause analysis techniques

Education

BS degree in Electrical Engineering or related field

Tools

ATE testers

Job description

Rambus, located in San Jose, is looking for a Sr Principal Applications Engineer to tackle complex DRAM and memory interface issues. The successful candidate will support international customers and work with cutting-edge technologies in a hybrid work setup.

Ideal candidates will have substantial experience in hardware design and excellent communication skills, coupled with a BS degree in Electrical Engineering or related field. The position offers a competitive salary range of $157,600 to $292,600 based on experience.

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