Senior Post-Silicon High-Speed IO Validation Engineer

Advanced Micro Devices, Inc.; Austin (TX); On-site; USD 140,000 - 170,000; Full time

Job summary

Advanced Micro Devices, Inc. (AMD) is seeking a Senior Technical Validation Engineer to join our datacenter CPU post-silicon validation team, focusing on high-speed IO and inter-die interfaces.

You will lead validation efforts across UCIe, UALink, PCIe Gen5/6+, and CXL, develop test plans, automate lab setups, and collaborate with cross-functional teams to push the boundaries of server performance.

Qualifications

• Bachelor's or Master's degree in CS/CE/EE or equivalent.
• Experience with UCIe, UALink, PCIe Gen5/6+, CXL or inter-die interfaces.
• Strong English communication and collaboration skills.
• Experience developing validation methodologies and lab automation.
• Ability to lead multiple projects and debug at SoC/system level.

Responsibilities

• Develop and execute feature enablement and validation test plans for SoC- and system-level IO features across all AMD Server products.
• Develop test content for focus testing and system-level stress testing of IO domain and cross-product stress testing.
• Develop post-silicon validation infrastructure (software, hardware, automation environment, and lab setup).
• Test interactions between various SoC features using validation infrastructure.
• Debug and drive root-cause analysis for SoC related issues.
• Collaborate with cross-functional teams to improve validation tools and debug workflows.
• Advance post-silicon validation strategy, methodology, and processes across programs.

Skills

C/C++

Python

Linux

Debugging

English communication

Education

Bachelor's or Master's in CS/CE/EE

Tools

Oscilloscope

Logic Analyzers

PCIe test tools

Job description

Advanced Micro Devices, Inc. (AMD) is seeking a Senior Technical Validation Engineer to join our datacenter CPU post-silicon validation team, focusing on high-speed IO and inter-die interfaces.

You will lead validation efforts across UCIe, UALink, PCIe Gen5/6+, and CXL, develop test plans, automate lab setups, and collaborate with cross-functional teams to push the boundaries of server performance.