Senior Physical Design and Timing Engineer

NVIDIA Corporation; Santa Clara (CA); Hybrid; USD 136,000 - 218,500; Full time

Benefits offered by this job

Comprehensive benefits package

Equity options

Job summary

NVIDIA Corporation is seeking a Senior Physical Design and Timing Engineer in Santa Clara, California. This role will focus on driving the physical design and timing of high-frequency and low-power CPUs and GPUs.

The ideal candidate should have a BS in Electrical Engineering or equivalent, with extensive experience in static timing analysis and logic synthesis. NVIDIA offers competitive salaries and benefits, including equity options and a diverse workplace.

Qualifications

• 5+ years experience in Synthesis and Timing or 3+ years with MS.
• Hands-on experience in logic synthesis and equivalence checking.
• Understanding of DFT logic and design closure.

Responsibilities

• Drive physical design and timing of NVIDIA CPUs, GPUs, and SoCs.
• Interact in a cross-functional environment with multiple teams.
• Improve convergence flows working with the Methodology Team.

Skills

Static Timing Analysis

Logic Synthesis

Physical Design

Programming (Perl, Tcl, Python)

Education

BS in Electrical or Computer Engineering

Tools

EDA Tools

Job description

## Senior Physical Design and Timing EngineerApplylocations: US, CA, Santa Clara: US, TX, Austin: US, OR, Hillsboro: US, NC, Durhamtime type: Full timeposted on: Posted Todayjob requisition id: JR2020717NVIDIA has been transforming computer graphics, PC gaming, and accelerated computing for more than 25 years. It’s a unique legacy of innovation that’s fueled by great technology—and amazing people. Today, we’re tapping into the unlimited potential of AI to define the next era of computing. An era in which our GPU acts as the brains of computers, robots, and self-driving cars that can understand the world. Doing what’s never been done before takes vision, innovation, and the world’s best talent. As an NVIDIAN, you’ll be immersed in a diverse, supportive environment where everyone is inspired to do their best work. Come join the team and see how you can make a lasting impact on the world. We are now looking for a motivated Senior Physical Design and Timing Engineer to join our dynamic and growing team. If you want to challenge yourself and be a part of something great, join us today! NVIDIA has continuously reinvented itself over two decades. Our invention of the GPU in 1999 sparked the growth of the PC gaming market, redefined modern computer graphics, and revolutionized parallel computing! More recently, GPU deep learning ignited modern AI — the next era of computing. NVIDIA is a “learning machine” that constantly evolves by adapting to new opportunities which are hard to tackle, that only we can pursue, and that matter to the world. This is our life’s work, to amplify human inventiveness and intelligence.# **What you'll be doing:*** Drive physical design and timing of high-frequency and low-power NVIDIA CPUs, GPUs, LPUs and SoCs at block level, cluster level, and/or full chip level.* Help in driving frontend and backend implementation from RTL to gds2, including synthesis, equivalence checking, floor-planning, timing constraints, timing and power convergence, and ECO implementation.* Work in a cross-functional environment interacting with multiple teams.* Apply knowledge and experience to improve the convergence flows working with the Methodology Team.# **What we need to see:*** BS (or equivalent experience) in Electrical or Computer Engineering with 5+ years experience or MS (or equivalent experience) with 3+ years experience in Synthesis and Timing* Solid experience in full-chip/sub-chip Static Timing Analysis (STA), timing constraints generation and management, and timing convergence.* Experience in critical path planning and crafting needed.* Hands on experience in logic synthesis and equivalence checking/FV. Good understanding of hardware architecture and hands-on skills in RTL/logic design for timing closure.* Expertise in physical design and optimization e.g. placement, routing, cell sizing, buffering, logic restructuring, etc. to improve timing and power, along with a background in implementing them through ECOs.* Understanding of DFT logic and hands-on experience in design closure.* Expertise in analyzing and converging crosstalk delay, noise glitch, and electrical/manufacturing rules in deep-sub micron processes.* Knowledge in process variation effect modeling and experience in design convergence taking into account variations.* Expertise and in-depth knowledge of industry standard EDA tools.* Proficiency in programming and scripting languages, such as, Perl, Tcl, Make, Python, etc. **Ways to stand out from the crowd:*** Background in high-performance design, such as CPU, GPU, LPU, implementation and timing convergence, this is a plus* Experience with DFT timing closure for various modes e.g. scan shift and capture, transition faults, BIST, etc.* Experience in methodology and/or flow development/automation. NVIDIA is widely considered to be the leader of AI computing, and one of the technology world’s most desirable employers. We have some of the most forward-thinking and hardworking people in the world working for us. If you're creative and autonomous, we want to hear from you. Widely considered to be one of the technology world’s most desirable employers, NVIDIA offers highly competitive salaries and a comprehensive benefits package. As you plan your future, see what we can offer to you and your family www.nvidiabenefits.com/ #LI-HybridYour base salary will be determined based on your location, experience, and the pay of employees in similar positions. The base salary range is 136,000 USD - 218,500 USD for Level 3, and 168,000 USD - 264,500 USD for Level 4.You will also be eligible for equity and benefits.Applications for this job will be accepted at least until July 5, 2026.This posting is for an existing vacancy.NVIDIA uses AI tools in its recruiting processes.NVIDIA is committed to fostering an inclusive work environment and proud to be an equal opportunity employer. As we highly value diversity in our current and future employees, we do not discriminate (including in our hiring and promotion practices) on the basis of race, religion, color, national origin, gender, gender expression, sexual orientation, age, marital status, veteran status, disability status or any other characteristic protected by law.