Senior PDK Support Engineer (Physical Verification)

Intel Corporation; Santa Clara (CA); On-site; USD 174,000 - 330,000; Full time

Benefits offered by this job

Stock bonuses

Health benefits

Retirement plan

Vacation

Job summary

Intel Corporation is seeking a senior Physical Verification enablement engineer in Santa Clara, CA. You will lead PV runs, identify violations, and work with cross-functional teams to resolve issues for leading-edge PDKs.

The role emphasizes customer interaction, root-cause analysis, and maintaining PV training materials. The position offers hybrid work with collaboration across US locations and internal Intel partners.

Qualifications

• BS degree with 7+ years in Physical Verification or related field.
• MS with 5+ years or PhD with 3+ years in Electrical/Computer Engineering or related STEM fields.
• 3+ years PV experience for IP/SoC; PV tools knowledge preferred.

Responsibilities

• Perform PV runs and identify violations; debug and root-cause issues.
• Clarify problems with customers and Intel teams; develop solutions.
• Maintain training documents and user guides; support customer issues.

Skills

Physical Verification

EDA Tools

Customer Interaction

Root Cause Analysis

Education

BS degree

MS degree

PhD degree

Tools

ICV

Calibre

Pegasus

Job description

Job Details: Job Description

Business Group At Intel, Design Technology Platform (DTP) is one of the key pillars enabling Intel to deliver winning products in the marketplace. You will directly drive and work with DTP cross functional teams to ensure design-kit leadership for customer enablement of cutting-edge technologies. You will work with customers to outline critical requirements, collaborate with Intel internal partners to define issue scope, plan execution, and innovate competitive solutions to meet customer needs.

About the Role

This senior role is to support Physical Verification (DRC/LVS/ERC/Density/LU, etc.) for Intel leading edge PDKs. You will perform the PV runs, identify the violation, work with teams to clarify problem root causes, find or/and implement the solutions. Tasks will also include owning/maintaining training documents, user guide, and customer issue support. As a DEAS (Design Enablement Application and Support) key member, you must have good communication skills to interact with customers directly, apply analytical problem-solving capability to identify the key requests, and root-cause the issue in a teamwork environment with DTP stakeholders to support and enable customer success.

Core Competencies

Customer-oriented and self-motivated mindset. Good communication skills, verbal and written.

Qualifications

Minimum Qualifications:

• Candidate must possess a BS degree with 7+ years of experience in Physical Verification, Physical Design Methodology, Design Enablement, or EDA Applications Engineering.
• or MS degree 5+ years of experience or PhD degree with 3+ years of experience in Electrical/Computer Engineering, or related STEM fields.
• 3+ years of experience in the following: Physical Verification role for IP or SoC
• Experienced in Physical Verification tools and flows like ICV, Calibre, Pegasus
• Experienced in solving PV issues, includes design rule interpretation, root cause identification, runset/flow debug Intel and/or external foundry process technology knowledge in advance nodes
• Experience interacting / communicating with customers directly

Preferred Qualifications: Experience Analyzing issues, solving problems, and bringing closure.

Job Type

Experienced Hire Shift: Shift 1 (United States of America) Primary Location: US, California, Santa Clara Additional Locations: US, Arizona, Phoenix, US, Oregon, Hillsboro

Posting Statement

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

Position of Trust

N/A

Benefits

We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock bonuses, and benefit programs which include health, retirement, and vacation. Find out more about the benefits of working at Intel.

Annual Salary Range for jobs which could be performed in the US

$173,660.00-330,340.00 USD The range displayed on this job posting reflects the minimum and maximum target compensation for the position across all US locations. Within the range, individual pay is determined by work location and additional factors, including job-related skills, experience, and relevant education or training. Your recruiter can share more about the specific compensation range for your preferred location during the hiring process.

Work Model for this Role

This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. Job posting details (such as work model, location or time type) are subject to change. ADDITIONAL INFORMATION: Intel is committed to Responsible Business Alliance (RBA) compliance and ethical hiring practices. We do not charge any fees during our hiring process. Candidates should never be required to pay recruitment fees, medical examination fees, or any other charges as a condition of employment. If you are asked to pay any fees during our hiring process, please report this immediately to your recruiter. Intel's official careers website. Find your next job and take on projects that shape tomorrow’s technology.